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Searched refs:CG_CGLS_TILE_1 (Results 1 – 2 of 2) sorted by relevance

/openbsd/sys/dev/pci/drm/radeon/
H A Dcypress_dpm.c128 WREG32_CG(CG_CGLS_TILE_1, 0xFFFFFFFF); in cypress_gfx_clock_gating_enable()
155 WREG32_CG(CG_CGLS_TILE_1, 0); in cypress_gfx_clock_gating_enable()
H A Devergreend.h240 #define CG_CGLS_TILE_1 0x21 macro