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Searched refs:CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4124 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT 0x1e macro
H A Dgfx_8_1_sh_mask.h4646 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT 0x1e macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13101 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT … macro
H A Dgc_9_1_sh_mask.h14405 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h14270 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16637 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h4203 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17648 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20528 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19893 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18681 #define CP_HQD_EOP_RPTR__RPTR_EQ_CSMD_WPTR__SHIFT … macro