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Searched refs:CP_PERFMON_CNTL__PERFMON_STATE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2671 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h3236 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h3856 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h4378 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT 0x0 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21088 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT … macro
H A Dgc_9_1_sh_mask.h22399 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h22338 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h24533 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h16129 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h30916 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h30929 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h33525 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h29177 #define CP_PERFMON_CNTL__PERFMON_STATE__SHIFT … macro