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Searched refs:CP_RB0_RPTR__RB_RPTR__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2735 #define CP_RB0_RPTR__RB_RPTR__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h3068 #define CP_RB0_RPTR__RB_RPTR__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h3682 #define CP_RB0_RPTR__RB_RPTR__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h4204 #define CP_RB0_RPTR__RB_RPTR__SHIFT 0x0 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1206 #define CP_RB0_RPTR__RB_RPTR__SHIFT macro
H A Dgc_9_1_sh_mask.h1105 #define CP_RB0_RPTR__RB_RPTR__SHIFT macro
H A Dgc_9_2_1_sh_mask.h1072 #define CP_RB0_RPTR__RB_RPTR__SHIFT macro
H A Dgc_9_4_3_sh_mask.h1122 #define CP_RB0_RPTR__RB_RPTR__SHIFT macro
H A Dgc_9_4_2_sh_mask.h1705 #define CP_RB0_RPTR__RB_RPTR__SHIFT macro
H A Dgc_11_0_0_sh_mask.h6558 #define CP_RB0_RPTR__RB_RPTR__SHIFT macro
H A Dgc_10_1_0_sh_mask.h6694 #define CP_RB0_RPTR__RB_RPTR__SHIFT macro
H A Dgc_11_0_3_sh_mask.h7333 #define CP_RB0_RPTR__RB_RPTR__SHIFT macro
H A Dgc_10_3_0_sh_mask.h6960 #define CP_RB0_RPTR__RB_RPTR__SHIFT macro