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Searched refs:CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2921 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT 0x0000001d macro
H A Dgfx_7_2_sh_mask.h2574 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT 0x1d macro
H A Dgfx_8_0_sh_mask.h3138 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT 0x1d macro
H A Dgfx_8_1_sh_mask.h3660 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT 0x1d macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19386 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro
H A Dgc_9_1_sh_mask.h20697 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h20624 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h22752 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h12851 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h26774 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h27299 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h29274 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h25560 #define CP_SIG_SEM_ADDR_HI__SEM_SELECT__SHIFT … macro