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Searched refs:D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT (Results 1 – 19 of 19) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h2536 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT 0x00000008 macro
H A Ddce_8_0_sh_mask.h11048 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT 0x8 macro
H A Ddce_10_0_sh_mask.h11432 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT 0x8 macro
H A Ddce_11_0_sh_mask.h11244 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT 0x8 macro
H A Ddce_11_2_sh_mask.h12498 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT 0x8 macro
H A Ddce_12_0_sh_mask.h2281 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h318 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_1_0_sh_mask.h1727 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h228 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h625 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h4516 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h7281 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h5221 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h7866 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h7938 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h331 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h331 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h312 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h4515 #define D3VGA_CONTROL__D3VGA_TIMING_SELECT__SHIFT … macro