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Searched refs:DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK (Results 1 – 18 of 18) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h4263 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK 0x00000040L macro
H A Ddce_8_0_sh_mask.h6673 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK 0x40 macro
H A Ddce_10_0_sh_mask.h15954 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK 0x40 macro
H A Ddce_11_0_sh_mask.h16174 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK 0x40 macro
H A Ddce_11_2_sh_mask.h16924 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK 0x40 macro
H A Ddce_12_0_sh_mask.h7604 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h27022 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_2_1_0_sh_mask.h32941 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_3_0_1_sh_mask.h26790 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_3_2_1_sh_mask.h39274 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_3_1_2_sh_mask.h43855 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h41957 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_3_1_4_sh_mask.h34945 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_3_1_6_sh_mask.h44914 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h30968 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h36281 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h35346 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro
H A Ddcn_3_2_0_sh_mask.h39271 #define DC_I2C_DDC3_SETUP__DC_I2C_DDC3_ENABLE_MASK … macro