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Searched refs:DC_IP_REQUEST_CNTL (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/dcn302/
H A Ddcn302_hwseq.c171 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn302_dsc_pg_control()
173 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn302_dsc_pg_control()
222 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn302_dsc_pg_control()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn31/
H A Ddcn31_hwseq.c295 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn31_dsc_pg_control()
297 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn31_dsc_pg_control()
330 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn31_dsc_pg_control()
351 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn31_enable_power_gating_plane()
353 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn31_enable_power_gating_plane()
371 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn31_enable_power_gating_plane()
449 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn31_hubp_pg_control()
451 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn31_hubp_pg_control()
475 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn31_hubp_pg_control()
H A Ddcn31_resource.c729 SR(DC_IP_REQUEST_CNTL), \
763 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn314/
H A Ddcn314_hwseq.c255 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn314_dsc_pg_control()
257 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn314_dsc_pg_control()
298 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn314_dsc_pg_control()
316 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn314_enable_power_gating_plane()
318 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn314_enable_power_gating_plane()
337 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn314_enable_power_gating_plane()
H A Ddcn314_resource.c737 SR(DC_IP_REQUEST_CNTL), \
774 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
/openbsd/sys/dev/pci/drm/amd/display/dc/dce/
H A Ddce_hwseq.h254 SR(DC_IP_REQUEST_CNTL)
319 SR(DC_IP_REQUEST_CNTL)
369 SR(DC_IP_REQUEST_CNTL)
477 SR(DC_IP_REQUEST_CNTL), \
537 SR(DC_IP_REQUEST_CNTL), \
597 uint32_t DC_IP_REQUEST_CNTL; member
812 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
877 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
917 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
969 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
[all …]
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_hwseq.c83 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn32_dsc_pg_control()
85 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn32_dsc_pg_control()
126 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn32_dsc_pg_control()
140 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn32_enable_power_gating_plane()
142 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn32_enable_power_gating_plane()
157 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn32_enable_power_gating_plane()
H A Ddcn32_resource.c578 SR(DC_IP_REQUEST_CNTL), \
614 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.c198 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn20_enable_power_gating_plane()
200 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn20_enable_power_gating_plane()
234 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn20_enable_power_gating_plane()
370 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn20_dsc_pg_control()
372 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn20_dsc_pg_control()
429 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn20_dsc_pg_control()
1126 if (REG(DC_IP_REQUEST_CNTL)) { in dcn20_power_on_plane_resources()
1127 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn20_power_on_plane_resources()
1136 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn20_power_on_plane_resources()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c739 if (REG(DC_IP_REQUEST_CNTL)) { in power_on_plane_resources()
740 REG_SET(DC_IP_REQUEST_CNTL, 0, in power_on_plane_resources()
749 REG_SET(DC_IP_REQUEST_CNTL, 0, in power_on_plane_resources()
766 REG_SET(DC_IP_REQUEST_CNTL, 0, in undo_DEGVIDCN10_253_wa()
770 REG_SET(DC_IP_REQUEST_CNTL, 0, in undo_DEGVIDCN10_253_wa()
795 REG_SET(DC_IP_REQUEST_CNTL, 0, in apply_DEGVIDCN10_253_wa()
799 REG_SET(DC_IP_REQUEST_CNTL, 0, in apply_DEGVIDCN10_253_wa()
1233 if (REG(DC_IP_REQUEST_CNTL)) { in dcn10_plane_atomic_power_down()
1234 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn10_plane_atomic_power_down()
1245 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn10_plane_atomic_power_down()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn316/
H A Ddcn316_resource.c725 SR(DC_IP_REQUEST_CNTL), \
759 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn315/
H A Ddcn315_resource.c728 SR(DC_IP_REQUEST_CNTL), \
762 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn321/
H A Ddcn321_resource.c577 SR(DC_IP_REQUEST_CNTL), \
613 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \