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Searched refs:DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/df/
H A Ddf_1_7_sh_mask.h44 #define DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK 0x000000F0L macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Ddf_v1_7.c62 tmp &= DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK; in df_v1_7_get_fb_channel_number()
/openbsd/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c74 #define DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK … macro
944 DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK) >> in vega10_hwmgr_backend_init()