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Searched refs:DIG_FIFO_CTRL0 (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_dio_stream_encoder.c353 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_READ_START_LEVEL, 0x7); in enc32_stream_encoder_dp_unblank()
355 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_RESET, 1); in enc32_stream_encoder_dp_unblank()
357 REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, 1, 10, 5000); in enc32_stream_encoder_dp_unblank()
359 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_RESET, 0); in enc32_stream_encoder_dp_unblank()
361 REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, 0, 10, 5000); in enc32_stream_encoder_dp_unblank()
363 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_ENABLE, 1); in enc32_stream_encoder_dp_unblank()
425 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_MODE, pix_per_container == 2 ? 0x1 : 0x0); in enc32_set_dig_input_mode()
434 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_RESET, reset_val); in enc32_reset_fifo()
438 REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, reset_val, 10, 5000); in enc32_reset_fifo()
447 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_READ_START_LEVEL, 0x7); in enc32_enable_fifo()
[all …]
H A Ddcn32_dio_link_encoder.h33 SRI(DIG_FIFO_CTRL0, DIG, id)
H A Ddcn32_resource.h302 SRI_ARR(DIG_FIFO_CTRL0, DIG, id) \
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn314/
H A Ddcn314_dio_stream_encoder.c58 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_RESET, reset_val); in enc314_reset_fifo()
62 REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, reset_val, 10, 5000); in enc314_reset_fifo()
71 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_READ_START_LEVEL, 0x7); in enc314_enable_fifo()
76 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_ENABLE, 1); in enc314_enable_fifo()
83 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_ENABLE, 0); in enc314_disable_fifo()
419 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_OUTPUT_PIXEL_MODE, pix_per_container == 2 ? 0x1 : 0x0); in enc314_set_dig_input_mode()
H A Ddcn314_dio_stream_encoder.h110 SRI(DIG_FIFO_CTRL0, DIG, id)
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.h170 uint32_t DIG_FIFO_CTRL0; member
H A Ddcn10_stream_encoder.h190 uint32_t DIG_FIFO_CTRL0; member