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Searched refs:DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT (Results 1 – 17 of 17) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5974 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT 0x00000001 macro
H A Ddce_8_0_sh_mask.h7716 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT 0x1 macro
H A Ddce_10_0_sh_mask.h6760 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT 0x1 macro
H A Ddce_11_0_sh_mask.h6656 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT 0x1 macro
H A Ddce_11_2_sh_mask.h7736 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT 0x1 macro
H A Ddce_12_0_sh_mask.h4659 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1337 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_1_0_sh_mask.h3629 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h2135 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h2280 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h1760 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h1271 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h10390 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h2327 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h2206 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h2403 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h2273 #define DMCU_STATUS__UC_IN_WAIT_MODE__SHIFT macro