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Searched refs:DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO2_PERIOD (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h2893 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO2_PERIOD= 0x0, enumerator
H A Ddce_11_2_enum.h3330 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO2_PERIOD= 0x0, enumerator
/openbsd/sys/dev/pci/drm/amd/include/
H A Dvega10_enum.h8953 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO2_PERIOD = 0x00000000, enumerator
H A Dnavi10_enum.h7453 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO2_PERIOD = 0x00000000, enumerator
H A Dsoc21_enum.h7715 DP_AUX_DPHY_RX_CONTROL_RECEIVE_WINDOW__1TO2_PERIOD = 0x00000000, enumerator