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Searched refs:DP_DPHY_CNTL__DPHY_ATEST_SEL_LANE1__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h6256 #define DP_DPHY_CNTL__DPHY_ATEST_SEL_LANE1__SHIFT 0x00000001 macro
H A Ddce_8_0_sh_mask.h9180 #define DP_DPHY_CNTL__DPHY_ATEST_SEL_LANE1__SHIFT 0x1 macro
H A Ddce_10_0_sh_mask.h8656 #define DP_DPHY_CNTL__DPHY_ATEST_SEL_LANE1__SHIFT 0x1 macro
H A Ddce_11_0_sh_mask.h8332 #define DP_DPHY_CNTL__DPHY_ATEST_SEL_LANE1__SHIFT 0x1 macro
H A Ddce_11_2_sh_mask.h9594 #define DP_DPHY_CNTL__DPHY_ATEST_SEL_LANE1__SHIFT 0x1 macro