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Searched refs:DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT (Results 1 – 20 of 20) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h6340 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h1668 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h1674 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h1622 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h1800 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h2811 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h271 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_0_3_sh_mask.h669 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_1_0_sh_mask.h2161 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h601 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h1011 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h477 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h953 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h456 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h8415 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h1503 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h724 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h728 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h719 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h478 #define DP_DTO0_PHASE__DP_DTO0_PHASE__SHIFT macro