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Searched refs:DP_VID_N_MUL (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h365 SE_SF(DP0_DP_VID_TIMING, DP_VID_N_MUL, mask_sh)
494 uint8_t DP_VID_N_MUL; member
626 uint32_t DP_VID_N_MUL; member
H A Ddce_stream_encoder.c324 if (enc110->se_mask->DP_VID_N_MUL) in dce110_stream_encoder_dp_set_stream_attribute()
325 REG_UPDATE(DP_VID_TIMING, DP_VID_N_MUL, 1); in dce110_stream_encoder_dp_set_stream_attribute()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn314/
H A Ddcn314_dio_stream_encoder.c333 DP_VID_N_MUL, n_multiply); in enc314_stream_encoder_dp_unblank()
H A Ddcn314_dio_stream_encoder.h196 SE_SF(DP0_DP_VID_TIMING, DP_VID_N_MUL, mask_sh),\
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_dio_stream_encoder.c324 DP_VID_N_MUL, n_multiply); in enc32_stream_encoder_dp_unblank()
H A Ddcn32_dio_stream_encoder.h117 SE_SF(DP0_DP_VID_TIMING, DP_VID_N_MUL, mask_sh),\
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.h339 SE_SF(DP0_DP_VID_TIMING, DP_VID_N_MUL, mask_sh),\
509 type DP_VID_N_MUL;\
H A Ddcn10_stream_encoder.c1002 DP_VID_N_MUL, n_multiply); in enc1_stream_encoder_dp_unblank()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_stream_encoder.c511 DP_VID_N_MUL, n_multiply); in enc2_stream_encoder_dp_unblank()
/openbsd/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_stream_encoder.h211 SE_SF(DP0_DP_VID_TIMING, DP_VID_N_MUL, mask_sh),\
/openbsd/sys/dev/pci/drm/amd/include/
H A Dnavi10_enum.h5792 typedef enum DP_VID_N_MUL { enum
5797 } DP_VID_N_MUL; typedef
H A Dsoc21_enum.h6612 typedef enum DP_VID_N_MUL { enum
6617 } DP_VID_N_MUL; typedef