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Searched refs:DSCEnabled (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h320 unsigned int dml32_DSCDelayRequirement(bool DSCEnabled,
H A Ddisplay_mode_vba_32.c336 if ((mode_lib->vba.BlendingAndTiming[k] != k) || !mode_lib->vba.DSCEnabled[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
364 v->DSCDelay[k] = dml32_DSCDelayRequirement(mode_lib->vba.DSCEnabled[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
375 if (j != k && mode_lib->vba.BlendingAndTiming[k] == j && mode_lib->vba.DSCEnabled[j]) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3748 mode_lib->vba.DSCEnabled[k] = mode_lib->vba.RequiresDSC[mode_lib->vba.VoltageLevel][k]; in dml32_ModeSupportAndSystemConfigurationFull()
H A Ddisplay_mode_vba_util_32.c1715 unsigned int dml32_DSCDelayRequirement(bool DSCEnabled, in dml32_DSCDelayRequirement() argument
1730 if (DSCEnabled == true && OutputBpp != 0) { in dml32_DSCDelayRequirement()
1755 dml_print("DML::%s: DSCEnabled = %d\n", __func__, DSCEnabled); in dml32_DSCDelayRequirement()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c1813 if ((mode_lib->vba.BlendingAndTiming[k] != k) || !mode_lib->vba.DSCEnabled[k]) { in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1844 if (mode_lib->vba.DSCEnabled[k] && bpp != 0) { in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1884 && mode_lib->vba.DSCEnabled[j]) in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3267 bool DSCEnabled, in TruncToValidBPP() argument
3304 if (DSCEnabled) { in TruncToValidBPP()
4017 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN20_MAX_DSC_IMAGE_WIDTH)) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4205 if (mode_lib->vba.DSCEnabled[k] == true) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4236 if (mode_lib->vba.DSCEnabled[k] == true) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4269 if (mode_lib->vba.DSCEnabled[k] == true || mode_lib->vba.Outbpp == BPP_INVALID) { in dml20v2_ModeSupportAndSystemConfigurationFull()
5229 mode_lib->vba.DSCEnabled[k] = in dml20v2_ModeSupportAndSystemConfigurationFull()
H A Ddisplay_mode_vba_20.c1777 if ((mode_lib->vba.BlendingAndTiming[k] != k) || !mode_lib->vba.DSCEnabled[k]) { in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1808 if (mode_lib->vba.DSCEnabled[k] && bpp != 0) { in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1848 && mode_lib->vba.DSCEnabled[j]) in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3193 bool DSCEnabled, in TruncToValidBPP() argument
3230 if (DSCEnabled) { in TruncToValidBPP()
4088 if (mode_lib->vba.DSCEnabled[k] == true) { in dml20_ModeSupportAndSystemConfigurationFull()
4117 if (mode_lib->vba.DSCEnabled[k] == true) { in dml20_ModeSupportAndSystemConfigurationFull()
4148 if (mode_lib->vba.DSCEnabled[k] == true || mode_lib->vba.Outbpp == BPP_INVALID) { in dml20_ModeSupportAndSystemConfigurationFull()
5113 mode_lib->vba.DSCEnabled[k] = in dml20_ModeSupportAndSystemConfigurationFull()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c1769 if ((mode_lib->vba.BlendingAndTiming[k] != k) || !mode_lib->vba.DSCEnabled[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1800 if (mode_lib->vba.DSCEnabled[k] && bpp != 0) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1840 && mode_lib->vba.DSCEnabled[j]) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3273 bool DSCEnabled, in TruncToValidBPP() argument
3310 if (DSCEnabled) { in TruncToValidBPP()
4111 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN21_MAX_DSC_IMAGE_WIDTH)) { in dml21_ModeSupportAndSystemConfigurationFull()
4299 if (mode_lib->vba.DSCEnabled[k] == true) { in dml21_ModeSupportAndSystemConfigurationFull()
4330 if (mode_lib->vba.DSCEnabled[k] == true) { in dml21_ModeSupportAndSystemConfigurationFull()
4363 if (mode_lib->vba.DSCEnabled[k] == true || mode_lib->vba.Outbpp == BPP_INVALID) { in dml21_ModeSupportAndSystemConfigurationFull()
5235 mode_lib->vba.DSCEnabled[k] = in dml21_ModeSupportAndSystemConfigurationFull()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h508 bool DSCEnabled[DC__NUM_DPP__MAX]; member
H A Ddisplay_mode_vba.c647 mode_lib->vba.DSCEnabled[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_enable; in fetch_pipe_params()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c2110 if ((v->BlendingAndTiming[k] != k) || !v->DSCEnabled[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2137 if (v->DSCEnabled[k] && BPP != 0) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2172 && v->DSCEnabled[j]) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3899 if (v->DSCEnabled[k] && v->HActive[k] > DCN30_MAX_DSC_IMAGE_WIDTH in dml30_ModeSupportAndSystemConfigurationFull()
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c2238 if ((v->BlendingAndTiming[k] != k) || !v->DSCEnabled[k]) {
2265 if (v->DSCEnabled[k] && BPP != 0) {
2301 if (j != k && v->BlendingAndTiming[k] == j && v->DSCEnabled[j])
4126 if (v->DSCEnabled[k] && v->HActive[k] > DCN31_MAX_DSC_IMAGE_WIDTH
/openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c2259 if ((v->BlendingAndTiming[k] != k) || !v->DSCEnabled[k]) {
2286 if (v->DSCEnabled[k] && BPP != 0) {
2322 if (j != k && v->BlendingAndTiming[k] == j && v->DSCEnabled[j])
4218 if (v->DSCEnabled[k] && v->HActive[k] > DCN314_MAX_DSC_IMAGE_WIDTH