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Searched refs:GEN8_GT_IIR (Results 1 – 7 of 7) sorted by relevance

/openbsd/sys/dev/pci/drm/i915/gt/
H A Dintel_gt_irq.c413 iir = raw_reg_read(regs, GEN8_GT_IIR(0)); in gen8_gt_irq_handler()
419 raw_reg_write(regs, GEN8_GT_IIR(0), iir); in gen8_gt_irq_handler()
424 iir = raw_reg_read(regs, GEN8_GT_IIR(1)); in gen8_gt_irq_handler()
430 raw_reg_write(regs, GEN8_GT_IIR(1), iir); in gen8_gt_irq_handler()
435 iir = raw_reg_read(regs, GEN8_GT_IIR(3)); in gen8_gt_irq_handler()
439 raw_reg_write(regs, GEN8_GT_IIR(3), iir); in gen8_gt_irq_handler()
444 iir = raw_reg_read(regs, GEN8_GT_IIR(2)); in gen8_gt_irq_handler()
448 raw_reg_write(regs, GEN8_GT_IIR(2), iir); in gen8_gt_irq_handler()
H A Dintel_gt_pm_irq.c65 i915_reg_t reg = GRAPHICS_VER(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; in gen6_gt_pm_reset_iir()
H A Dintel_rps.c2330 pm_iir = intel_uncore_read(uncore, GEN8_GT_IIR(2));
/openbsd/sys/dev/pci/drm/i915/
H A Dintel_gvt_mmio_table.c731 MMIO_D(GEN8_GT_IIR(0)); in iterate_bdw_plus_mmio()
735 MMIO_D(GEN8_GT_IIR(1)); in iterate_bdw_plus_mmio()
739 MMIO_D(GEN8_GT_IIR(2)); in iterate_bdw_plus_mmio()
743 MMIO_D(GEN8_GT_IIR(3)); in iterate_bdw_plus_mmio()
H A Di915_reg.h4347 #define GEN8_GT_IIR(which) _MMIO(0x44308 + (0x10 * (which))) macro
/openbsd/sys/dev/pci/drm/i915/gt/uc/
H A Dintel_guc.c99 guc_WARN_ON_ONCE(guc, intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) & in gen9_enable_guc_interrupts()
/openbsd/sys/dev/pci/drm/i915/gvt/
H A Dhandlers.c2448 MMIO_DH(GEN8_GT_IIR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_bdw_mmio_info()
2452 MMIO_DH(GEN8_GT_IIR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_bdw_mmio_info()
2456 MMIO_DH(GEN8_GT_IIR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_bdw_mmio_info()
2460 MMIO_DH(GEN8_GT_IIR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_bdw_mmio_info()