1 /* $OpenBSD: gusreg.h,v 1.7 2022/01/09 05:42:42 jsg Exp $ */ 2 /* $NetBSD: gusreg.h,v 1.6 1997/10/09 07:57:22 jtc Exp $ */ 3 4 /*- 5 * Copyright (c) 1996 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Ken Hornstein and John Kohl. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Register definitions of Gravis UltraSound card 35 */ 36 37 /* 38 * MIDI control registers. Essentially a MC6850 UART. Note the MC6850's 39 * "feature" of having read-only and write-only registers combined on one 40 * address. 41 */ 42 43 #define GUS_IOH4_OFFSET 0x100 44 #define GUS_NPORT4 2 45 46 #define GUS_MIDI_CONTROL (0x100-GUS_IOH4_OFFSET) 47 #define GUS_MIDI_STATUS (0x100-GUS_IOH4_OFFSET) 48 #define GUS_MIDI_READ (0x101-GUS_IOH4_OFFSET) 49 #define GUS_MIDI_WRITE (0x101-GUS_IOH4_OFFSET) 50 51 /* 52 * Joystick interface - note this is an absolute address, NOT an offset from 53 * the GUS base address. 54 */ 55 56 #define GUS_JOYSTICK 0x201 57 58 /* 59 * GUS control registers 60 */ 61 62 #define GUS_MIX_CONTROL 0x000 63 #define GUS_IRQ_STATUS 0x006 64 #define GUS_TIMER_CONTROL 0x008 65 #define GUS_TIMER_DATA 0x009 66 #define GUS_REG_CONTROL 0x00f /* rev 3.4 or later only: select reg 67 at 2XB */ 68 #define GUS_REG_NORMAL 0x00 /* IRQ/DMA as usual */ 69 #define GUS_REG_IRQCTL 0x05 /* IRQ ctl: write 0 to clear IRQ state */ 70 #define GUS_REG_JUMPER 0x06 /* jumper control: */ 71 #define GUS_JUMPER_MIDIEN 0x02 /* bit: enable MIDI ports */ 72 #define GUS_JUMPER_JOYEN 0x04 /* bit: enable joystick ports */ 73 74 #define GUS_IRQ_CONTROL 0x00b 75 #define GUS_DMA_CONTROL 0x00b 76 #define GUS_IRQCTL_CONTROL 0x00b 77 #define GUS_JUMPER_CONTROL 0x00b 78 79 #define GUS_NPORT1 16 80 81 #define GUS_IOH2_OFFSET 0x102 82 #define GUS_VOICE_SELECT (0x102-GUS_IOH2_OFFSET) 83 #define GUS_REG_SELECT (0x103-GUS_IOH2_OFFSET) 84 #define GUS_DATA_LOW (0x104-GUS_IOH2_OFFSET) 85 #define GUS_DATA_HIGH (0x105-GUS_IOH2_OFFSET) 86 /* GUS_MIXER_SELECT 106 */ 87 #define GUS_DRAM_DATA (0x107-GUS_IOH2_OFFSET) 88 89 #define GUS_NPORT2 6 90 91 /* 92 * GUS on-board global registers 93 */ 94 95 #define GUSREG_DMA_CONTROL 0x41 96 #define GUSREG_DMA_START 0x42 97 #define GUSREG_DRAM_ADDR_LOW 0x43 98 #define GUSREG_DRAM_ADDR_HIGH 0x44 99 #define GUSREG_TIMER_CONTROL 0x45 100 #define GUSREG_TIMER1_COUNT 0x46 /* count-up, then interrupt, 80usec */ 101 #define GUSREG_TIMER2_COUNT 0x47 /* count-up, then interrupt, 320usec */ 102 #define GUSREG_SAMPLE_FREQ 0x48 /* 9878400/(16*(rate+2)) */ 103 #define GUSREG_SAMPLE_CONTROL 0x49 104 #define GUSREG_JOYSTICK_TRIM 0x4b 105 #define GUSREG_RESET 0x4c 106 107 /* 108 * GUS voice specific registers (some of which aren't!). Add 0x80 to these 109 * registers for reads 110 */ 111 112 #define GUSREG_READ 0x80 113 #define GUSREG_VOICE_CNTL 0x00 114 #define GUSREG_FREQ_CONTROL 0x01 115 #define GUSREG_START_ADDR_HIGH 0x02 116 #define GUSREG_START_ADDR_LOW 0x03 117 #define GUSREG_END_ADDR_HIGH 0x04 118 #define GUSREG_END_ADDR_LOW 0x05 119 #define GUSREG_VOLUME_RATE 0x06 120 #define GUSREG_START_VOLUME 0x07 121 #define GUSREG_END_VOLUME 0x08 122 #define GUSREG_CUR_VOLUME 0x09 123 #define GUSREG_CUR_ADDR_HIGH 0x0a 124 #define GUSREG_CUR_ADDR_LOW 0x0b 125 #define GUSREG_PAN_POS 0x0c 126 #define GUSREG_VOLUME_CONTROL 0x0d 127 #define GUSREG_ACTIVE_VOICES 0x0e /* voice-independent:set voice count */ 128 #define GUSREG_IRQ_STATUS 0x8f /* voice-independent */ 129 130 #define GUS_PAN_FULL_LEFT 0x0 131 #define GUS_PAN_FULL_RIGHT 0xf 132 133 /* 134 * GUS Bitmasks for reset register 135 */ 136 137 #define GUSMASK_MASTER_RESET 0x01 138 #define GUSMASK_DAC_ENABLE 0x02 139 #define GUSMASK_IRQ_ENABLE 0x04 140 141 /* 142 * Bitmasks for IRQ status port 143 */ 144 145 #define GUSMASK_IRQ_MIDIXMIT 0x01 /* MIDI transmit IRQ */ 146 #define GUSMASK_IRQ_MIDIRCVR 0x02 /* MIDI received IRQ */ 147 #define GUSMASK_IRQ_TIMER1 0x04 /* timer 1 IRQ */ 148 #define GUSMASK_IRQ_TIMER2 0x08 /* timer 2 IRQ */ 149 #define GUSMASK_IRQ_RESERVED 0x10 /* Reserved (set to 0) */ 150 #define GUSMASK_IRQ_VOICE 0x20 /* Wavetable IRQ (any voice) */ 151 #define GUSMASK_IRQ_VOLUME 0x40 /* Volume ramp IRQ (any voc) */ 152 #define GUSMASK_IRQ_DMATC 0x80 /* DMA transfer complete */ 153 154 /* 155 * Bitmasks for sampling control register 156 */ 157 #define GUSMASK_SAMPLE_START 0x01 /* start sampling */ 158 #define GUSMASK_SAMPLE_STEREO 0x02 /* mono or stereo */ 159 #define GUSMASK_SAMPLE_DATA16 0x04 /* 16-bit DMA channel */ 160 #define GUSMASK_SAMPLE_IRQ 0x20 /* enable IRQ */ 161 #define GUSMASK_SAMPLE_DMATC 0x40 /* DMA transfer complete */ 162 #define GUSMASK_SAMPLE_INVBIT 0x80 /* invert MSbit */ 163 164 /* 165 * Bitmasks for IRQ status register (different than IRQ status _port_ - the 166 * register is internal to the GUS) 167 */ 168 169 #define GUSMASK_WIRQ_VOLUME 0x40 /* Flag for volume interrupt */ 170 #define GUSMASK_WIRQ_VOICE 0x80 /* Flag for voice interrupt */ 171 #define GUSMASK_WIRQ_VOICEMASK 0x1f /* Bits holding voice # */ 172 173 /* 174 * GUS bitmasks for built-in mixer control (separate from the ICS or CS chips) 175 */ 176 177 #define GUSMASK_LINE_IN 0x01 /* 0=enable */ 178 #define GUSMASK_LINE_OUT 0x02 /* 0=enable */ 179 #define GUSMASK_MIC_IN 0x04 /* 1=enable */ 180 #define GUSMASK_LATCHES 0x08 /* enable IRQ latches */ 181 #define GUSMASK_COMBINE 0x10 /* combine Ch 1 IRQ & Ch 2 (MIDI) */ 182 #define GUSMASK_MIDI_LOOPBACK 0x20 /* MIDI loopback */ 183 #define GUSMASK_CONTROL_SEL 0x40 /* Select control register */ 184 185 #define GUSMASK_BOTH_RQ 0x40 /* Combine both RQ lines */ 186 187 /* 188 * GUS bitmasks for DMA control 189 */ 190 191 #define GUSMASK_DMA_ENABLE 0x01 /* Enable DMA transfer */ 192 #define GUSMASK_DMA_READ 0x02 /* 1=read, 0=write */ 193 #define GUSMASK_DMA_WRITE 0x00 /* for consistency */ 194 #define GUSMASK_DMA_WIDTH 0x04 /* Data transfer width */ 195 #define GUSMASK_DMA_R0 0x00 /* Various DMA speeds */ 196 #define GUSMASK_DMA_R1 0x08 197 #define GUSMASK_DMA_R2 0x10 198 #define GUSMASK_DMA_R3 0x18 199 #define GUSMASK_DMA_IRQ 0x20 /* Enable DMA to IRQ */ 200 #define GUSMASK_DMA_IRQPEND 0x40 /* DMA IRQ pending */ 201 #define GUSMASK_DMA_DATA_SIZE 0x40 /* 0=8 bit, 1=16 bit */ 202 #define GUSMASK_DMA_INVBIT 0x80 /* invert high bit */ 203 204 /* 205 * GUS bitmasks for voice control 206 */ 207 208 #define GUSMASK_VOICE_STOPPED 0x01 /* The voice is stopped */ 209 #define GUSMASK_STOP_VOICE 0x02 /* Force voice to stop */ 210 #define GUSMASK_DATA_SIZE16 0x04 /* 1=16 bit, 0=8 bit data */ 211 #define GUSMASK_LOOP_ENABLE 0x08 /* Loop voice at end */ 212 #define GUSMASK_VOICE_BIDIR 0x10 /* Bi-directional looping */ 213 #define GUSMASK_VOICE_IRQ 0x20 /* Enable the voice IRQ */ 214 #define GUSMASK_INCR_DIR 0x40 /* Direction of address incr */ 215 #define GUSMASK_VOICE_IRQPEND 0x80 /* Pending IRQ for voice */ 216 217 /* 218 * Bitmasks for volume control 219 */ 220 221 #define GUSMASK_VOLUME_STOPPED 0x01 /* Volume ramping stopped */ 222 #define GUSMASK_STOP_VOLUME 0x02 /* Manually stop volume */ 223 #define GUSMASK_VOICE_ROLL 0x04 /* Roll over/low water condition */ 224 #define GUSMASK_VOLUME_LOOP 0x08 /* Volume ramp looping */ 225 #define GUSMASK_VOLUME_BIDIR 0x10 /* Bi-dir volume looping */ 226 #define GUSMASK_VOLUME_IRQ 0x20 /* IRQ on end of volume ramp */ 227 #define GUSMASK_VOLUME_DIR 0x40 /* Direction of volume ramp */ 228 #define GUSMASK_VOLUME_IRQPEND 0x80 /* Pending volume IRQ */ 229 #define MIDI_RESET 0x03 230 231 /* 232 * ICS Mixer registers 233 */ 234 235 #define GUS_IOH3_OFFSET 0x506 236 #define GUS_NPORT3 1 237 238 #define GUS_MIXER_SELECT (0x506-GUS_IOH3_OFFSET) /* read=board rev, wr=mixer */ 239 #define GUS_BOARD_REV (0x506-GUS_IOH3_OFFSET) 240 #define GUS_MIXER_DATA (0x106-GUS_IOH2_OFFSET) /* data for mixer control */ 241 242 #define GUSMIX_CHAN_MIC ICSMIX_CHAN_0 243 #define GUSMIX_CHAN_LINE ICSMIX_CHAN_1 244 #define GUSMIX_CHAN_CD ICSMIX_CHAN_2 245 #define GUSMIX_CHAN_DAC ICSMIX_CHAN_3 246 #define GUSMIX_CHAN_MASTER ICSMIX_CHAN_5 247 248 /* 249 * Codec/Mixer registers 250 */ 251 252 #define GUS_MAX_CODEC_BASE 0x10C 253 #define GUS_DAUGHTER_CODEC_BASE 0x530 254 #define GUS_DAUGHTER_CODEC_BASE2 0x604 255 #define GUS_DAUGHTER_CODEC_BASE3 0xE80 256 #define GUS_DAUGHTER_CODEC_BASE4 0xF40 257 258 #define GUS_CODEC_SELECT 0 259 #define GUS_CODEC_DATA 1 260 #define GUS_CODEC_STATUS 2 261 #define GUS_CODEC_PIO 3 262 263 #define GUS_MAX_CTRL 0x106 264 #define GUS_MAX_BASEBITS 0xf /* sets middle nibble of 3X6 */ 265 #define GUS_MAX_RECCHAN16 0x10 /* 0=8bit DMA read, 1=16bit DMA read */ 266 #define GUS_MAX_PLAYCHAN16 0x20 /* 0=8bit, 1=16bit */ 267 #define GUS_MAX_CODEC_ENABLE 0x40 /* 0=disable, 1=enable */ 268