| /openbsd/sys/dev/pci/drm/amd/display/dc/dce/ |
| H A D | dce_stream_encoder.h | 73 SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
146 SE_SF(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, mask_sh),\
154 SE_SF(HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, mask_sh),\
674 uint32_t HDMI_INFOFRAME_CONTROL1; member
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| H A D | dce_stream_encoder.c | 642 REG_UPDATE(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, in dce110_stream_encoder_hdmi_set_stream_attribute()
756 REG_UPDATE(HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, in dce110_stream_encoder_update_hdmi_info_packets()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_dio_stream_encoder.c | 259 REG_UPDATE(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, in enc314_stream_encoder_hdmi_set_stream_attribute()
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| H A D | dcn314_dio_stream_encoder.h | 67 SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_dio_stream_encoder.c | 226 REG_UPDATE(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, in enc32_stream_encoder_hdmi_set_stream_attribute()
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| H A D | dcn32_resource.h | 274 SRI_ARR(HDMI_INFOFRAME_CONTROL1, DIG, id), \
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_stream_encoder.h | 64 SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
158 uint32_t HDMI_INFOFRAME_CONTROL1; member
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| H A D | dcn10_stream_encoder.c | 594 REG_UPDATE(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, in enc1_stream_encoder_hdmi_set_stream_attribute()
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| /openbsd/sys/dev/pci/drm/radeon/ |
| H A D | evergreen_hdmi.c | 223 WREG32_P(HDMI_INFOFRAME_CONTROL1 + offset, in evergreen_set_avi_packet()
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| H A D | rv770d.h | 714 #define HDMI_INFOFRAME_CONTROL1 0x7418 macro
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| H A D | evergreend.h | 564 #define HDMI_INFOFRAME_CONTROL1 0x7048 macro
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dio_stream_encoder.h | 66 SRI(HDMI_INFOFRAME_CONTROL1, DIG, id), \
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| H A D | dcn30_dio_stream_encoder.c | 706 REG_UPDATE(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, in enc3_stream_encoder_hdmi_set_stream_attribute()
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| /openbsd/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | dce_v6_0.c | 1485 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, in dce_v6_0_audio_set_avi_infoframe()
1598 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, 2); in dce_v6_0_audio_hdmi_enable()
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| H A D | dce_v10_0.c | 1650 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, 2); in dce_v10_0_afmt_setmode()
1728 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, 2); in dce_v10_0_afmt_setmode()
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| H A D | dce_v11_0.c | 1699 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, 2); in dce_v11_0_afmt_setmode()
1777 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, 2); in dce_v11_0_afmt_setmode()
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