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Searched refs:IS_ROCKETLAKE (Results 1 – 25 of 26) sorted by relevance

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/openbsd/sys/dev/pci/drm/i915/soc/
H A Dintel_pch.c101 !IS_ROCKETLAKE(dev_priv)); in intel_pch_type()
126 !IS_ROCKETLAKE(dev_priv) && in intel_pch_type()
180 else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_virt_detect_pch()
/openbsd/sys/dev/pci/drm/i915/display/
H A Dintel_combo_phy.c145 IS_ROCKETLAKE(i915) || in has_phy_misc()
213 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in phy_is_master()
H A Dintel_display_device.h40 #define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915))
H A Dintel_bw.c260 if (IS_ROCKETLAKE(dev_priv)) { in icl_get_qgv_points()
674 else if (IS_ROCKETLAKE(dev_priv)) in intel_bw_init_hw()
H A Dintel_dpll_mgr.c3226 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_get_combo_phy_dpll()
3558 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_pll_get_hw_state()
3622 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_dpll_write()
4154 else if (IS_ROCKETLAKE(dev_priv)) in intel_shared_dpll_init()
H A Dintel_bios.c2225 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { in map_ddc_pin()
2369 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in dvo_port_to_port()
3555 } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) { in map_aux_ch()
H A Dintel_vdsc.c345 if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A) in intel_dsc_power_domain()
H A Dintel_dmc.c1061 } else if (IS_ROCKETLAKE(i915)) { in intel_dmc_init()
H A Dintel_ddi_buf_trans.c1723 } else if (IS_ROCKETLAKE(i915)) { in intel_ddi_buf_trans_init()
H A Dintel_audio.c1269 if ((IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) && in i915_audio_component_init()
H A Dintel_display_power_map.c1665 else if (IS_ROCKETLAKE(i915)) in intel_display_power_map_init()
H A Dintel_display_power.c1614 (IS_ROCKETLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))) in tgl_bw_buddy_init()
H A Dskl_universal_plane.c2199 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || in gen12_plane_has_mc_ccs()
H A Dintel_ddi.c4877 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_ddi_init()
4954 else if (IS_ROCKETLAKE(dev_priv)) in intel_ddi_init()
H A Dintel_hdmi.c2901 else if (IS_ROCKETLAKE(dev_priv)) in intel_hdmi_default_ddc_pin()
H A Dintel_psr.c1085 if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_psr2_config_valid()
H A Dintel_cdclk.c3612 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_init_cdclk_hooks()
H A Dintel_display.c1750 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_phy_is_combo()
1802 else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1) in intel_port_to_phy()
/openbsd/sys/dev/pci/drm/i915/gt/
H A Dintel_tlb.c88 IS_ROCKETLAKE(i915) || in mmio_invalidate_full()
H A Dintel_workarounds.c2364 IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()
2377 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()
2397 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()
2406 if (IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) { in rcs_engine_wa_init()
H A Dintel_mocs.c530 } else if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in get_mocs_settings()
/openbsd/sys/dev/pci/drm/i915/
H A Dintel_step.c213 } else if (IS_ROCKETLAKE(i915)) { in intel_step_init()
H A Di915_drv.h641 #define IS_ROCKETLAKE(i915) IS_PLATFORM(i915, INTEL_ROCKETLAKE) macro
/openbsd/sys/dev/pci/drm/i915/gt/uc/
H A Dintel_uc.c40 if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in uc_expand_default_options()
/openbsd/sys/dev/pci/drm/i915/gem/
H A Di915_gem_context.c505 !IS_ROCKETLAKE(i915) && !IS_ALDERLAKE_S(i915)) { in set_proto_ctx_engines_bond()

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