/openbsd/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsAnalyzeImmediate.cpp | 18 MipsAnalyzeImmediate::Inst::Inst(unsigned O, unsigned I) : Opc(O), ImmOpnd(I) {} in Inst() 93 (Seq[1].Opc != SLL) || (Seq[1].ImmOpnd < 16)) in ReplaceADDiuSLLWithLUi() 97 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd); in ReplaceADDiuSLLWithLUi() 98 int64_t ShiftedImm = (uint64_t)Imm << (Seq[1].ImmOpnd - 16); in ReplaceADDiuSLLWithLUi() 105 Seq[0].ImmOpnd = (unsigned)(ShiftedImm & 0xffff); in ReplaceADDiuSLLWithLUi()
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H A D | MipsAnalyzeImmediate.h | 20 unsigned Opc, ImmOpnd; member 22 Inst(unsigned Opc, unsigned ImmOpnd);
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H A D | MipsSEISelDAGToDAG.cpp | 809 SDValue ImmOpnd = CurDAG->getTargetConstant(SignExtend64<16>(Inst->ImmOpnd), in trySelect() local 816 RegOpnd = CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64, ImmOpnd); in trySelect() 821 ImmOpnd); in trySelect() 825 ImmOpnd = CurDAG->getTargetConstant(SignExtend64<16>(Inst->ImmOpnd), DL, in trySelect() 828 SDValue(RegOpnd, 0), ImmOpnd); in trySelect()
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H A D | MipsSEInstrInfo.cpp | 643 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd)); in loadImmediate() 646 .addImm(SignExtend64<16>(Inst->ImmOpnd)); in loadImmediate() 651 .addImm(SignExtend64<16>(Inst->ImmOpnd)); in loadImmediate() 654 *NewImm = Inst->ImmOpnd; in loadImmediate()
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H A D | Mips32r6InstrInfo.td | 317 Operand ImmOpnd, InstrItinClass itin> 320 dag InOperandList = (ins ImmOpnd:$imm); 331 Operand ImmOpnd, InstrItinClass itin> 334 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp); 747 Operand ImmOpnd, InstrItinClass itin> 750 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
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H A D | MicroMips32r6InstrInfo.td | 516 Operand ImmOpnd, InstrItinClass Itin> 519 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp); 552 Operand ImmOpnd, InstrItinClass Itin> 555 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2); 564 Operand ImmOpnd, InstrItinClass Itin> 567 dag InOperandList = (ins ImmOpnd:$imm);
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H A D | MicroMipsDSPInstrInfo.td | 217 RegisterOperand RO, Operand ImmOpnd> { 219 dag InOperandList = (ins RO:$rs, ImmOpnd:$sa);
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H A D | MicroMipsInstrInfo.td | 334 class ShiftIMM16<string opstr, Operand ImmOpnd, RegisterOperand RO, 336 MicroMipsInst16<(outs RO:$rd), (ins RO:$rt, ImmOpnd:$shamt),
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H A D | MipsDSPInstrInfo.td | 356 RegisterOperand RO, Operand ImmOpnd> { 358 dag InOperandList = (ins RO:$rt, ImmOpnd:$rs_sa);
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H A D | MipsInstrInfo.td | 1359 class shift_rotate_imm<string opstr, Operand ImmOpnd, 1363 InstSE<(outs RO:$rd), (ins RO:$rt, ImmOpnd:$shamt),
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/openbsd/gnu/llvm/llvm/lib/Target/LoongArch/ |
H A D | LoongArchInstrInfo.td | 390 class ALU_3RI2<bits<15> op, string opstr, Operand ImmOpnd> 393 class ALU_3RI3<bits<14> op, string opstr, Operand ImmOpnd> 396 class ALU_2RI5<bits<17> op, string opstr, Operand ImmOpnd> 399 class ALU_2RI6<bits<16> op, string opstr, Operand ImmOpnd> 402 class ALU_2RI12<bits<10> op, string opstr, Operand ImmOpnd> 405 class ALU_2RI16<bits<6> op, string opstr, Operand ImmOpnd> 408 class ALU_1RI20<bits<7> op, string opstr, Operand ImmOpnd> 773 : Pat<(OpNode GPR:$rj, ImmOpnd:$imm), 774 (Inst GPR:$rj, ImmOpnd:$imm)>; 776 : Pat<(sext_inreg (OpNode GPR:$rj, ImmOpnd:$imm), i32), [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 7500 SDValue ImmOpnd = Base.getOperand(1); in PeepholePPC64() local 7507 if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(ImmOpnd)) { in PeepholePPC64() 7533 if (HImmOpnd != ImmOpnd) in PeepholePPC64() 7544 if (auto *C = dyn_cast<ConstantSDNode>(ImmOpnd)) { in PeepholePPC64() 7553 ImmOpnd = CurDAG->getTargetConstant(Offset, SDLoc(ImmOpnd), in PeepholePPC64() 7554 ImmOpnd.getValueType()); in PeepholePPC64() 7585 dyn_cast<ConstantPoolSDNode>(ImmOpnd)) { in PeepholePPC64() 7587 ImmOpnd = CurDAG->getTargetConstantPool(C, MVT::i64, CP->getAlign(), in PeepholePPC64() 7593 (void)CurDAG->UpdateNodeOperands(N, N->getOperand(0), ImmOpnd, in PeepholePPC64() 7596 (void)CurDAG->UpdateNodeOperands(N, ImmOpnd, Base.getOperand(0), in PeepholePPC64() [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64FrameLowering.cpp | 1093 MachineOperand *ImmOpnd = nullptr; in fixupSEHOpcode() local 1103 ImmOpnd = &MBBI->getOperand(ImmIdx); in fixupSEHOpcode() 1106 if (ImmOpnd) in fixupSEHOpcode() 1107 ImmOpnd->setImm(ImmOpnd->getImm() + LocalStackSize); in fixupSEHOpcode()
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H A D | AArch64InstrInfo.cpp | 4703 const MachineOperand &ImmOpnd = in isAArch64FrameOffsetLegal() local 4705 Offset += ImmOpnd.getImm() * Scale; in isAArch64FrameOffsetLegal()
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoC.td | 277 Operand ImmOpnd> 278 : RVInst16CB<0b100, 0b01, (outs cls:$rs1_wb), (ins cls:$rs1, ImmOpnd:$imm),
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