1 /* $OpenBSD: if_bmreg.h,v 1.3 2005/10/09 04:24:50 brad Exp $ */ 2 /* $NetBSD: if_bmreg.h,v 1.2 2000/01/25 14:38:50 tsubai Exp $ */ 3 4 /* 5 * Copyright 1991-1998 by Open Software Foundation, Inc. 6 * All Rights Reserved 7 * 8 * Permission to use, copy, modify, and distribute this software and 9 * its documentation for any purpose and without fee is hereby granted, 10 * provided that the above copyright notice appears in all copies and 11 * that both the copyright notice and this permission notice appear in 12 * supporting documentation. 13 * 14 * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 16 * FOR A PARTICULAR PURPOSE. 17 * 18 * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 19 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 20 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 21 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 22 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 23 */ 24 25 /* -------------------------------------------------------------------- */ 26 /* Heathrow (F)eature (C)ontrol (R)egister Addresses */ 27 /* -------------------------------------------------------------------- */ 28 #define EnetEnable 0x60000000 /* enable Enet Xcvr/Controller */ 29 #define ResetEnetCell 0x80000000 /* reset Enet cell */ 30 31 /* -------------------------------------------------------------------- */ 32 /* BigMac Register Numbers & Bit Assignments */ 33 /* -------------------------------------------------------------------- */ 34 #define XIFC 0x0000 35 #define TxOutputEnable 0x0001 36 #define MIILoopbackBits 0x0006 37 #define MIIBufferEnable 0x0008 38 #define SQETestEnable 0x0010 39 #define LinkStatus 0x0100 40 #define TXFIFOCSR 0x0100 41 #define TxFIFOEnable 0x0001 42 #define TxFIFO128 0x0000 43 #define TXTH 0x0110 44 #define RXFIFOCSR 0x0120 45 #define RxFIFOEnable TxFIFOEnable 46 #define RxFIFO128 TxFIFO128 47 #define MEMADD 0x0130 48 #define MEMDATAHI 0x0140 49 #define MEMDATALO 0x0150 50 #define XCVRIF 0x0160 51 #define COLActiveLow 0x0002 52 #define SerialMode 0x0004 53 #define ClkBit 0x0008 54 #define CHIPID 0x0170 55 #define MIFCSR 0x0180 56 #define MIFDC 0x0001 /* MII clock */ 57 #define MIFDO 0x0002 /* MII data out */ 58 #define MIFDIR 0x0004 /* MII direction (1: write) */ 59 #define MIFDI 0x0008 /* MII data in */ 60 #define SROMCSR 0x0190 61 #define TXPNTR 0x01A0 62 #define RXPNTR 0x01B0 63 #define STATUS 0x0200 64 #define INTDISABLE 0x0210 65 #define IntFrameReceived 0x0001 66 #define IntRxFrameCntExp 0x0002 67 #define IntRxAlignCntExp 0x0004 68 #define IntRxCRCCntExp 0x0008 69 #define IntRxLenCntExp 0x0010 70 #define IntRxOverFlow 0x0020 71 #define IntRxCodeViolation 0x0040 72 #define IntSQETestError 0x0080 73 #define IntFrameSent 0x0100 74 #define IntTxUnderrun 0x0200 75 #define IntTxMaxSizeError 0x0400 76 #define IntTxNormalCollExp 0x0800 77 #define IntTxExcessCollExp 0x1000 78 #define IntTxLateCollExp 0x2000 79 #define IntTxNetworkCollExp 0x4000 80 #define IntTxDeferTimerExp 0x8000 81 #define NormalIntEvents ~(IntFrameSent) 82 #define NoEventsMask 0xFFFF 83 84 #define TxNeverGiveUp 0x0400 85 #define TXRST 0x0420 86 #define TxResetBit 0x0001 87 #define TXCFG 0x0430 88 #define TxMACEnable 0x0001 89 #define TxThreshold 0x0004 90 #define TxFullDuplex 0x0200 91 #define IPG1 0x0440 92 #define IPG2 0x0450 93 #define ALIMIT 0x0460 94 #define SLOT 0x0470 95 #define PALEN 0x0480 96 #define PAPAT 0x0490 97 #define TXSFD 0x04A0 98 #define JAM 0x04B0 99 #define TXMAX 0x04C0 100 #define TXMIN 0x04D0 101 #define PAREG 0x04E0 102 #define DCNT 0x04F0 103 #define NCCNT 0x0500 104 #define NTCNT 0x0510 105 #define EXCNT 0x0520 106 #define LTCNT 0x0530 107 #define RSEED 0x0540 108 #define TXSM 0x0550 109 #define RXRST 0x0620 110 #define RxResetValue 0x0000 111 #define RXCFG 0x0630 112 #define RxMACEnable 0x0001 113 #define ReservedValue 0x0004 114 #define RxPromiscEnable 0x0040 115 #define RxCRCEnable 0x0100 116 #define RxRejectOwnPackets 0x0200 117 #define RxHashFilterEnable 0x0800 118 #define RxAddrFilterEnable 0x1000 119 #define RXMAX 0x0640 120 #define RXMIN 0x0650 121 #define MADD2 0x0660 122 #define MADD1 0x0670 123 #define MADD0 0x0680 124 #define FRCNT 0x0690 125 #define LECNT 0x06A0 126 #define AECNT 0x06B0 127 #define FECNT 0x06C0 128 #define RXSM 0x06D0 129 #define RXCV 0x06E0 130 #define HASH3 0x0700 131 #define HASH2 0x0710 132 #define HASH1 0x0720 133 #define HASH0 0x0730 134 #define AFR2 0x0740 135 #define AFR1 0x0750 136 #define AFR0 0x0760 137 #define AFCR 0x0770 138 #define EnableAllCompares 0x0fff 139 140 /* -------------------------------------------------------------------- */ 141 /* Misc. Bit definitions for BMac Status word */ 142 /* -------------------------------------------------------------------- */ 143 #define RxAbortBit 0x8000 /* status bit in BMac status for rx packets */ 144 #define RxLengthMask 0x3FFF /* bits that determine length of rx packets */ 145