Searched refs:LoadOp (Results 1 – 6 of 6) sorted by relevance
/openbsd/gnu/llvm/llvm/lib/Target/CSKY/ |
H A D | CSKYInstrInfo.td | 1031 multiclass LdPat<PatFrag LoadOp, ImmLeaf imm_type, Instruction Inst, ValueType Type> { 1032 def : Pat<(Type (LoadOp GPR:$rs1)), (Inst GPR:$rs1, 0)>; 1034 def : Pat<(Type (LoadOp (add GPR:$rs1, imm_type:$uimm))), 1036 def : Pat<(Type (LoadOp (add frameindex:$rs1, imm_type:$uimm))), 1038 def : Pat<(Type (LoadOp (eqToAdd frameindex:$rs1, imm_type:$uimm))), 1040 def : Pat<(Type (LoadOp (add GPR:$rs1, tglobaladdr:$gd))), 1056 multiclass LdrPat<PatFrag LoadOp, Instruction Inst, ValueType Type> { 1057 def : Pat<(Type (LoadOp (add GPR:$rs1, GPR:$rs2))), (Inst GPR:$rs1, GPR:$rs2, 0)>; 1058 def : Pat<(Type (LoadOp (add GPR:$rs1, (shl GPR:$rs2, (i32 1))))), (Inst GPR:$rs1, GPR:$rs2, 1)>; 1059 def : Pat<(Type (LoadOp (add GPR:$rs1, (shl GPR:$rs2, (i32 2))))), (Inst GPR:$rs1, GPR:$rs2, 2)>; [all …]
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 235 unsigned LoadOp = AMDGPUISD::LOAD_D16_HI; in matchLoadD16FromBuildVector() local 237 LoadOp = LdHi->getExtensionType() == ISD::SEXTLOAD ? in matchLoadD16FromBuildVector() 244 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdHi), VTList, in matchLoadD16FromBuildVector() 263 unsigned LoadOp = AMDGPUISD::LOAD_D16_LO; in matchLoadD16FromBuildVector() local 265 LoadOp = LdLo->getExtensionType() == ISD::SEXTLOAD ? in matchLoadD16FromBuildVector() 278 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdLo), VTList, in matchLoadD16FromBuildVector()
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/openbsd/gnu/llvm/llvm/lib/Target/LoongArch/ |
H A D | LoongArchInstrInfo.td | 1220 multiclass LdPat<PatFrag LoadOp, LAInst Inst, ValueType vt = GRLenVT> { 1221 def : Pat<(vt (LoadOp BaseAddr:$rj)), (Inst BaseAddr:$rj, 0)>; 1222 def : Pat<(vt (LoadOp (AddLike BaseAddr:$rj, simm12:$imm12))), 1242 class RegRegLdPat<PatFrag LoadOp, LAInst Inst, ValueType vt> 1243 : Pat<(vt (LoadOp (add NonFIBaseAddr:$rj, GPR:$rk))),
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfo.td | 1598 multiclass LdPat<PatFrag LoadOp, RVInst Inst, ValueType vt = XLenVT> { 1599 def : Pat<(vt (LoadOp (AddrRegImm GPR:$rs1, simm12:$imm12))),
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMInstrNEON.td | 1030 PatFrag LoadOp> 1036 (i32 (LoadOp addrmode6:$Rn)), 1042 PatFrag LoadOp> 1048 (i32 (LoadOp addrmode6oneL32:$Rn)), 1053 class VLD1QLNPseudo<ValueType Ty, PatFrag LoadOp> : VLDQLNPseudo<IIC_VLD1ln>, 1056 (i32 (LoadOp addrmode6:$addr)), 1370 class VLD1DUP<bits<4> op7_4, string Dt, ValueType Ty, PatFrag LoadOp, 1376 (Ty (ARMvdup (i32 (LoadOp AddrMode:$Rn)))))]>, 1394 class VLD1QDUP<bits<4> op7_4, string Dt, ValueType Ty, PatFrag LoadOp, 1400 (Ty (ARMvdup (i32 (LoadOp AddrMode:$Rn)))))]> {
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 13017 unsigned StoreOp = PPC::STD, LoadOp = PPC::LFD; in EmitInstrWithCustomInserter() local 13026 LoadOp = PPC::LD; in EmitInstrWithCustomInserter() 13057 BuildMI(*BB, MI, dl, TII->get(LoadOp), DestReg) in EmitInstrWithCustomInserter()
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