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Searched refs:MO2 (Results 1 – 13 of 13) sorted by relevance

/openbsd/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp116 printRegName(O, MO2.getReg()); in printInst()
412 printRegName(O, MO2.getReg()); in printSORegRegOperand()
443 if (!MO2.getReg()) { in printAM2PreOrOffsetIndexOp()
455 printRegName(O, MO2.getReg()); in printAM2PreOrOffsetIndexOp()
470 printRegName(O, MO2.getReg()); in printAddrModeTBB()
482 printRegName(O, MO2.getReg()); in printAddrModeTBH()
541 if (MO2.getReg()) { in printAM3PreOrOffsetIndexOp()
609 O << (MO2.getImm() ? "" : "-"); in printPostIdxRegOperand()
632 printRegName(O, MO2.getReg()); in printMveAddrModeRQOperand()
708 if (MO2.getImm()) { in printAddrMode6Operand()
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H A DARMMCTargetDesc.cpp449 const MCOperand &MO2 = Inst.getOperand(MemOpIndex + 1); in evaluateMemOpAddrForAddrMode_i12() local
453 int32_t OffImm = (int32_t)MO2.getImm(); in evaluateMemOpAddrForAddrMode_i12()
467 const MCOperand &MO2 = Inst.getOperand(MemOpIndex + 1); in evaluateMemOpAddrForAddrMode3() local
487 const MCOperand &MO2 = Inst.getOperand(MemOpIndex + 1); in evaluateMemOpAddrForAddrMode5() local
491 unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm()); in evaluateMemOpAddrForAddrMode5()
492 ARM_AM::AddrOpc Op = ARM_AM::getAM5Op(MO2.getImm()); in evaluateMemOpAddrForAddrMode5()
506 const MCOperand &MO2 = Inst.getOperand(MemOpIndex + 1); in evaluateMemOpAddrForAddrMode5FP16() local
510 unsigned ImmOffs = ARM_AM::getAM5FP16Offset(MO2.getImm()); in evaluateMemOpAddrForAddrMode5FP16()
511 ARM_AM::AddrOpc Op = ARM_AM::getAM5FP16Op(MO2.getImm()); in evaluateMemOpAddrForAddrMode5FP16()
526 const MCOperand &MO2 = Inst.getOperand(MemOpIndex + 1); in evaluateMemOpAddrForAddrModeT2_i8s4() local
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H A DARMMCCodeEmitter.cpp931 const MCOperand &MO2 = MI.getOperand(OpIdx + 1); in getThumbAddrModeRegRegOpValue() local
1254 const MCOperand &MO2 = MI.getOperand(OpIdx+2); in getLdStSORegOpValue() local
1257 unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()); in getLdStSORegOpValue()
1258 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add; in getLdStSORegOpValue()
1348 const MCOperand &MO2 = MI.getOperand(OpIdx+2); in getAddrMode3OpValue() local
1363 unsigned Imm = MO2.getImm(); in getAddrMode3OpValue()
1511 const MCOperand &MO2 = MI.getOperand(OpIdx + 2); in getSORegRegOpValue() local
1539 assert(ARM_AM::getSORegOffset(MO2.getImm()) == 0); in getSORegRegOpValue()
1595 const MCOperand &MO2 = MI.getOperand(OpNum+1); in getT2AddrModeSORegOpValue() local
1615 const MCOperand &MO2 = MI.getOperand(OpNum+1); in getT2AddrModeImmOpValue() local
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/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86OptimizeLEAs.cpp73 const MachineOperand &MO2);
215 assert(isValidDispOp(MO1) && isValidDispOp(MO2) && in isSimilarDispOp()
217 return (MO1.isImm() && MO2.isImm()) || in isSimilarDispOp()
218 (MO1.isCPI() && MO2.isCPI() && MO1.getIndex() == MO2.getIndex()) || in isSimilarDispOp()
219 (MO1.isJTI() && MO2.isJTI() && MO1.getIndex() == MO2.getIndex()) || in isSimilarDispOp()
220 (MO1.isSymbol() && MO2.isSymbol() && in isSimilarDispOp()
222 (MO1.isGlobal() && MO2.isGlobal() && in isSimilarDispOp()
223 MO1.getGlobal() == MO2.getGlobal()) || in isSimilarDispOp()
226 (MO1.isMCSymbol() && MO2.isMCSymbol() && in isSimilarDispOp()
227 MO1.getMCSymbol() == MO2.getMCSymbol()) || in isSimilarDispOp()
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H A DX86RegisterInfo.cpp967 MachineOperand &MO2 = MI->getOperand(2); in getTileShape() local
968 ShapeT Shape(&MO1, &MO2, MRI); in getTileShape()
/openbsd/gnu/llvm/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCCodeEmitter.cpp127 const MCOperand &MO2 = MI.getOperand(Op + 1); in getMemOpValue() local
128 if (MO2.isImm()) { in getMemOpValue()
130 return ((unsigned)MO2.getImm() << 4) | Reg; in getMemOpValue()
133 assert(MO2.isExpr() && "Expr operand expected"); in getMemOpValue()
146 Fixups.push_back(MCFixup::create(Offset, MO2.getExpr(), in getMemOpValue()
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1234 MCOperand &MO2) { in makeCombineInst() argument
1239 TmpInst.addOperand(MO2); in makeCombineInst()
1596 MCOperand &MO2 = Inst.getOperand(2); in processInstruction() local
1598 if (MO2.getExpr()->evaluateAsAbsolute(Value)) { in processInstruction()
1603 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, MO1, MO2); in processInstruction()
1617 MCOperand &MO2 = Inst.getOperand(2); in processInstruction() local
1618 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, MO1, MO2); in processInstruction()
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp925 MachineOperand &MO2 = Cond[2]; in reverseBranchCondition() local
926 switch (MO2.getReg()) { in reverseBranchCondition()
928 MO2.setReg(R600::PRED_SEL_ONE); in reverseBranchCondition()
931 MO2.setReg(R600::PRED_SEL_ZERO); in reverseBranchCondition()
H A DSIInstrInfo.cpp464 auto MO2 = *MI2.memoperands_begin(); in memOpsHaveSameBasePtr() local
465 if (MO1->getAddrSpace() != MO2->getAddrSpace()) in memOpsHaveSameBasePtr()
469 auto Base2 = MO2->getValue(); in memOpsHaveSameBasePtr()
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp454 MCOperand &MO2 = MappedInst.getOperand(2); in HexagonProcessInstruction() local
455 MCExpr const *Expr = MO2.getExpr(); in HexagonProcessInstruction()
/openbsd/gnu/llvm/llvm/lib/CodeGen/
H A DMachineScheduler.cpp970 for (const MachineOperand &MO2 : MI.operands()) { in collectVRegUses() local
971 if (MO2.isReg() && MO2.isDef() && MO2.getReg() == Reg && !MO2.isDead()) { in collectVRegUses()
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp754 for (auto MO2 : DefMI->uses()) in getConstantFromConstantPool() local
755 if (MO2.isCPI()) in getConstantFromConstantPool()
756 return (MCP->getConstants())[MO2.getIndex()].Val.ConstVal; in getConstantFromConstantPool()
/openbsd/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp1303 MachineOperand &MO2 = MI.getOperand(0); in narrowScalar() local
1306 MIRBuilder.buildSExt(MO2, DstExt); in narrowScalar()
1307 MO2.setReg(DstExt); in narrowScalar()