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Searched refs:MOV (Results 1 – 25 of 70) sorted by relevance

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/openbsd/gnu/usr.bin/binutils/opcodes/
H A Dia64-opc-i.c112 #define MOV(a,b,c,d) \ macro
114 {"mov.sptk", MOV (7, 0, 0, 0)},
115 {"mov.sptk.imp", MOV (7, 0, 1, 0)},
116 {"mov", MOV (7, 0, 0, 1)},
117 {"mov.imp", MOV (7, 0, 1, 1)},
118 {"mov.dptk", MOV (7, 0, 0, 2)},
119 {"mov.dptk.imp", MOV (7, 0, 1, 2)},
120 {"mov.ret.sptk", MOV (7, 1, 0, 0)},
122 {"mov.ret", MOV (7, 1, 0, 1)},
123 {"mov.ret.imp", MOV (7, 1, 1, 1)},
[all …]
/openbsd/gnu/usr.bin/binutils-2.17/opcodes/
H A Dia64-opc-i.c120 #define MOV(a,b,c,d) \ macro
122 {"mov.sptk", MOV (7, 0, 0, 0)},
123 {"mov.sptk.imp", MOV (7, 0, 1, 0)},
124 {"mov", MOV (7, 0, 0, 1)},
125 {"mov.imp", MOV (7, 0, 1, 1)},
126 {"mov.dptk", MOV (7, 0, 0, 2)},
127 {"mov.dptk.imp", MOV (7, 0, 1, 2)},
128 {"mov.ret.sptk", MOV (7, 1, 0, 0)},
130 {"mov.ret", MOV (7, 1, 0, 1)},
131 {"mov.ret.imp", MOV (7, 1, 1, 1)},
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/M68k/
H A DM68kInstrData.td123 def MOV # TYPE.Size # DST_REG # SRC_REG # TYPE.Postfix
130 def MOV # TYPE.Size # dd # TYPE.Postfix
151 def MOV # TYPE.Size # AM # REG # TYPE.Postfix
160 def MOV # TYPE.Size # AM # i # TYPE.Postfix
176 def MOV # TYPE.Size # REG # i # TYPE.Postfix
196 def MOV # TYPE.Size # REG # AM # TYPE.Postfix
206 def MOV # TYPE.Size # REG # AM # _TC
225 def MOV # TYPE.Size # DST_AM # SRC_AM # TYPE.Postfix
510 def MOV#EXT#Xd16d8 : MxPseudoMove_RR<MxType16d, MxType8d>;
511 def MOV#EXT#Xd32d8 : MxPseudoMove_RR<MxType32d, MxType8d>;
[all …]
H A DM68kInstrAtomics.td11 (!cast<MxInst>("MOV"#size#"dj") !cast<MxMemOp>("MxARI"#size):$ptr)>;
15 (!cast<MxInst>("MOV"#size#"jd") !cast<MxMemOp>("MxARI"#size):$ptr,
/openbsd/gnu/llvm/compiler-rt/lib/xray/
H A Dxray_trampoline_AArch64.S43 MOV X1, #0
96 MOV X1, #1
147 MOV X1, #1
H A Dxray_trampoline_arm.S32 MOV r1, #0
64 MOV r1, #1
97 MOV r1, #1
/openbsd/sys/arch/sh/sh/
H A Dvectors.S72 MOV (EXPEVT, r0)
79 MOV (TEA, r1)
100 MOV (BBRA, r1)
117 MOV (BBRA, r1)
/openbsd/sys/arch/sh/include/
H A Dlocore.h31 #define MOV(x, r) mov.l .L_##x, r; mov.l @r, r macro
35 #define MOV(x, r) mov.l .L_##x, r macro
39 #define MOV(x, r) mov.l .L_##x, r macro
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp60 buildDefaultInstruction(MBB, MI, R600::MOV, in copyPhysReg()
67 MachineInstr *NewMI = buildDefaultInstruction(MBB, MI, R600::MOV, in copyPhysReg()
90 case R600::MOV: in isMov()
1111 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, in buildIndirectWrite()
1143 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, in buildIndirectRead()
1342 MachineInstr *MovImm = buildDefaultInstruction(BB, I, R600::MOV, DstReg, in buildMovImm()
1351 return buildDefaultInstruction(*MBB, I, R600::MOV, DstReg, SrcReg); in buildMovInstr()
H A DCaymanInstructions.td146 // %t2_x = MOV %zero
H A DR600ISelLowering.cpp244 *BB, I, R600::MOV, MI.getOperand(0).getReg(), in EmitInstrWithCustomInserter()
252 *BB, I, R600::MOV, MI.getOperand(0).getReg(), in EmitInstrWithCustomInserter()
282 *BB, MI, R600::MOV, MI.getOperand(0).getReg(), R600::ALU_LITERAL_X); in EmitInstrWithCustomInserter()
293 *BB, MI, R600::MOV, MI.getOperand(0).getReg(), R600::ALU_CONST); in EmitInstrWithCustomInserter()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64SchedPredicates.td218 [// MOV {Rd, SP}, {SP, Rn} =>
232 // MOV Rd, Rm =>
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86ScheduleAtom.td515 "MOV(S|Z)X(32|64)rr(8|8_NOREX|16)")>;
609 "MOV(S|Z)X16rr8",
610 "MOV(UPS|UPD|DQU)mr",
626 "MOV(S|Z)X16rm8",
628 "MOV(UPS|UPD|DQU)rm",
H A DX86SchedAlderlakeP.td555 "^MOV(8|16)rm$",
819 "^MOV(32|64)sr$")>;
1070 def : InstRW<[ADLPWriteResGroup78], (instregex "^(V?)MOV(D|SH|SL)DUPrm$",
1411 def : InstRW<[ADLPWriteResGroup128], (instregex "^MOV(16|32|64)rs$",
1421 def : InstRW<[ADLPWriteResGroup130], (instregex "^MOV(8|32)o(16|32)a$",
1422 "^MOV(8|32|64)o64a$")>;
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMScheduleM4.td83 def : M4UnitL1I<(instregex "(t|t2)MOV")>;
H A DARMScheduleA57.td212 // MOV{S}, MOVW, MVN{S}
213 def : InstRW<[A57Write_1cyc_1I], (instregex "MOV(r|i|i16|r_TC)",
224 def : InstRW<[A57WriteMOVsi], (instregex "MOV(CC)?si", "MVNsi",
235 def : InstRW<[A57WriteMOVsr], (instregex "MOV(CC)?sr", "MVNsr", "t2MVNs",
H A DARMScheduleSwift.td155 // MOV(register-shiftedregister) MVN(register-shiftedregister)
157 // MOV,MVN
/openbsd/gnu/gcc/gcc/config/sh/
H A Dsh4a.md98 ;; MOV
/openbsd/gnu/llvm/llvm/lib/Target/Xtensa/
H A DXtensaOperands.td47 // imm12m predicate - Immediate for MOV operation
/openbsd/gnu/usr.bin/binutils/gas/doc/
H A Dc-arm.texi413 nothing. Currently it will evaluate to MOV r0, r0.
421 If expression evaluates to a numeric constant then a MOV or MVN
/openbsd/gnu/usr.bin/binutils-2.17/ld/emultempl/
H A Darmelf.em253 fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
/openbsd/gnu/gcc/gcc/config/mips/
H A Dsr71k.md48 ;; Floating point stores go to Ld/St and go to MOV in the floating point
/openbsd/gnu/usr.bin/gcc/gcc/config/mips/
H A Dsr71k.md48 ;; Floating point stores go to Ld/St and go to MOV in the floating point
/openbsd/gnu/usr.bin/binutils-2.17/gas/doc/
H A Dc-arm.texi557 nothing. Currently it will evaluate to MOV r0, r0.
565 If expression evaluates to a numeric constant then a MOV or MVN
/openbsd/gnu/llvm/llvm/lib/Target/ARC/
H A DARCInstrInfo.td365 // MOV instruction and variants (conditional mov).
775 // Compact MOV/ADD/CMP Immediate instructions.

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