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Searched refs:MVP_FIFO_STATUS__MVP_FIFO_UNDERFLOW_OCCURRED_MASK (Results 1 – 5 of 5) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7982 #define MVP_FIFO_STATUS__MVP_FIFO_UNDERFLOW_OCCURRED_MASK 0x01000000L macro
H A Ddce_8_0_sh_mask.h10309 #define MVP_FIFO_STATUS__MVP_FIFO_UNDERFLOW_OCCURRED_MASK 0x1000000 macro
H A Ddce_10_0_sh_mask.h10007 #define MVP_FIFO_STATUS__MVP_FIFO_UNDERFLOW_OCCURRED_MASK 0x1000000 macro
H A Ddce_11_0_sh_mask.h9701 #define MVP_FIFO_STATUS__MVP_FIFO_UNDERFLOW_OCCURRED_MASK 0x1000000 macro
H A Ddce_11_2_sh_mask.h10979 #define MVP_FIFO_STATUS__MVP_FIFO_UNDERFLOW_OCCURRED_MASK 0x1000000 macro