Home
last modified time | relevance | path

Searched refs:MemIndexedMode (Results 1 – 25 of 30) sorted by relevance

12

/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1330 SDValue Offset, ISD::MemIndexedMode AM);
1352 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1424 SDValue Offset, ISD::MemIndexedMode AM);
1433 getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1467 SDValue Offset, ISD::MemIndexedMode AM);
1470 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1481 SDValue Offset, ISD::MemIndexedMode AM);
1532 ISD::MemIndexedMode AM);
1552 ISD::MemIndexedMode AM);
1563 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
[all …]
H A DSelectionDAGNodes.h1015 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
2318 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2331 ISD::MemIndexedMode getAddressingMode() const {
2352 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2380 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
2414 ISD::MemIndexedMode AM, EVT MemVT,
2468 ISD::MemIndexedMode getAddressingMode() const {
2519 ISD::MemIndexedMode AM, ISD::LoadExtType ETy,
2622 ISD::MemIndexedMode AM, EVT MemVT,
2641 ISD::MemIndexedMode getAddressingMode() const {
[all …]
H A DISDOpcodes.h1377 enum MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC }; enum
H A DBasicTTIImpl.h191 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) { in getISDIndexedMode()
359 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedLoadLegal()
365 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedStoreLegal()
H A DTargetLowering.h3548 ISD::MemIndexedMode &/*AM*/, in getPreIndexedAddressParts() argument
3559 ISD::MemIndexedMode &/*AM*/, in getPostIndexedAddressParts() argument
/openbsd/gnu/llvm/llvm/lib/Target/AVR/
H A DAVRISelLowering.h110 ISD::MemIndexedMode &AM,
114 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DAVRISelDAGToDAG.cpp132 ISD::MemIndexedMode AM = LD->getAddressingMode(); in selectIndexedLoad()
H A DAVRISelLowering.cpp1039 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
1096 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/openbsd/gnu/llvm/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h185 ISD::MemIndexedMode &AM,
H A DMSP430ISelDAGToDAG.cpp303 ISD::MemIndexedMode AM = LD->getAddressingMode(); in isValidIndexedLoad()
H A DMSP430ISelLowering.cpp1340 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/openbsd/gnu/llvm/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h1410 enum MemIndexedMode { enum
1419 bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const;
1422 bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const;
1876 virtual bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const = 0;
1877 virtual bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const = 0;
2507 bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedLoadLegal()
2510 bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedStoreLegal()
H A DTargetTransformInfoImpl.h784 bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedLoadLegal()
789 bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedStoreLegal()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h1165 SDValue &Offset, ISD::MemIndexedMode &AM,
1168 ISD::MemIndexedMode &AM,
1171 SDValue &Offset, ISD::MemIndexedMode &AM,
/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.h496 ISD::MemIndexedMode &AM,
503 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DARMISelDAGToDAG.cpp832 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetReg()
868 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImmPre()
888 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImm()
967 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode3Offset()
1087 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); in SelectAddrMode6Offset()
1396 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectT2AddrModeImm8Offset()
1448 ISD::MemIndexedMode AM; in SelectT2AddrModeImm7Offset()
1592 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryARMIndexedLoad()
1672 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT1IndexedLoad()
1698 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT2IndexedLoad()
[all …]
H A DARMInstrMVE.td7111 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
7116 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
7195 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
7210 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
/openbsd/gnu/llvm/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp1090 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, in isIndexedLoadLegal()
1095 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, in isIndexedStoreLegal()
/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp8113 ISD::MemIndexedMode AM) { in getIndexedLoad()
8246 ISD::MemIndexedMode AM) { in getIndexedStore()
8296 SDValue SelectionDAG::getLoadVP(ISD::MemIndexedMode AM, in getLoadVP()
8376 ISD::MemIndexedMode AM) { in getIndexedLoadVP()
8498 ISD::MemIndexedMode AM) { in getIndexedStoreVP()
8627 ISD::MemIndexedMode AM) { in getIndexedStridedLoadVP()
8647 ISD::MemIndexedMode AM, in getStridedStoreVP()
8750 ISD::MemIndexedMode AM) { in getIndexedStridedStoreVP()
8870 ISD::MemIndexedMode AM, in getMaskedLoad()
8903 ISD::MemIndexedMode AM) { in getIndexedMaskedLoad()
[all …]
H A DSelectionDAGDumper.cpp507 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { in getIndexedModeName()
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h292 ISD::MemIndexedMode &AM,
H A DHexagonISelDAGToDAG.cpp455 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectLoad()
564 ISD::MemIndexedMode AM = ST->getAddressingMode(); in SelectStore()
H A DHexagonISelLowering.cpp628 SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/openbsd/gnu/llvm/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td1222 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1233 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1274 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1280 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h844 ISD::MemIndexedMode &AM,

12