/openbsd/gnu/usr.bin/binutils/gdb/ |
H A D | sparc-stub.c | 111 O0, O1, O2, O3, O4, O5, SP, O7, enumerator 626 *ptr++ = hexchars[O7 >> 4]; in handle_exception() 627 *ptr++ = hexchars[O7 & 0xf]; in handle_exception() 629 ptr = mem2hex((char *)®isters[O7], ptr, 4, 0); in handle_exception()
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/openbsd/gnu/llvm/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.cpp | 165 unsigned regOutRA = RegInfo.getDwarfRegNum(SP::O7, true); in emitPrologue() 237 MBB.addLiveIn(SP::O7); in emitEpilogue() 240 .addReg(SP::O7); in emitEpilogue() 241 BuildMI(MBB, MBBI, dl, TII.get(SP::ORrr), SP::O7) in emitEpilogue()
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H A D | SparcAsmPrinter.cpp | 176 assert(MO.getReg() != SP::O7 && in LowerGETPCXAndEmitMCInsts() 212 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts() 226 MCOperand RegO7 = MCOperand::createReg(SP::O7); in LowerGETPCXAndEmitMCInsts()
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H A D | SparcRegisterInfo.td | 146 def O7 : Ri<15, "O7">, DwarfRegNum<[15]>; 295 def O6_O7 : Rdi<14, "O6", [O6, O7]>;
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H A D | SparcRegisterInfo.cpp | 36 SparcRegisterInfo::SparcRegisterInfo() : SparcGenRegisterInfo(SP::O7) {} in SparcRegisterInfo()
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H A D | DelaySlotFiller.cpp | 296 RegDefs.insert(SP::O7); in insertCallDefsUses()
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H A D | SparcInstrAliases.td | 393 def : InstAlias<"call $addr", (JMPLrr O7, MEMrr:$addr), 0>; 394 def : InstAlias<"call $addr", (JMPLri O7, MEMri:$addr), 0>;
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H A D | SparcISelLowering.cpp | 226 static_assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7, in toCallerWindow() 1121 .Case("o4", SP::O4).Case("o5", SP::O5).Case("o6", SP::O6).Case("o7", SP::O7) in getRegisterByName()
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/openbsd/regress/lib/libcrypto/x509/bettertls/certificates/ |
H A D | 1437.crt | 14 FiQNNVyTH9cPcqWWEB7mi12iYYtMvMrpBDjvGGGWwuCA75OKMeklnjoRyLo/18O7
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H A D | 3389.key | 9 DQUknZiGNA0ZFzsr345mGc9elZXxcBnA2GfO32lhvGbuW5emipaTGfA6Ats/34O7
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H A D | 1978.key | 17 59SUe9YDdSsoLQWVJIyfvkB0tbfbD5b7A8aweNFV6J341KxvexfvHFUf1ckjo+O7
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H A D | 2774.key | 3 S8Oe1ZKIbm5YZ+LYuZ7+94huA4E9AICX0xtr6bzS320X/pL3rMnNkv//z7dHT/O7
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H A D | 1854.key | 16 oYX6zNwGJ9hCFV5ZvuqIiBCey+7O7/8YZ+e95kXzis/ek6LJ2RUOpI6KmsC6OzEB
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H A D | 2446.chain | 39 O7/aBtmzVoMCAwEAAaM6MDgwDwYDVR0TAQH/BAUwAwEB/zAlBgNVHR4BAf8EGzAZ
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H A D | 519.chain | 38 zy1Y0qLzhFEtxyf+O7/Rk9NmjL1kYshh4rvuNTkMZv1bNDL3qzNEF3bZNv6v9Gn9
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/openbsd/regress/bin/pax/ |
H A D | t3.sh | 14 MOOM?UF"%_6_X%V'G^7?BWUS_Z_XI3S4P_"OX-]?_AG^"R+^*?W/];_@O7,*_
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/openbsd/gnu/llvm/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcInstPrinter.cpp | 73 case SP::O7: O << "\tretl"; return true; in printSparcAliasInstr() 78 case SP::O7: // call $addr in printSparcAliasInstr()
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H A D | SparcMCTargetDesc.cpp | 64 InitSparcMCRegisterInfo(X, SP::O7); in createSparcMCRegisterInfo()
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/openbsd/gnu/usr.bin/binutils/gas/config/ |
H A D | tc-sparc.c | 3116 #define O7 15 macro 3141 || ((delay & RD (~0)) != RD (O7)))) 3143 if ((delay & RS1 (~0)) == RS1 (O7) 3145 && (delay & RS2 (~0)) == RS2 (O7))) 3164 == (INSN_OR | RD (O7) | RS2 (G0)))) 3174 != (INSN_OR | RS1 (O7) | RS2 (G0))) 3185 || reg == G0 || reg == O7)
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/openbsd/gnu/usr.bin/binutils-2.17/gas/config/ |
H A D | tc-sparc.c | 3188 #define O7 15 macro 3213 || ((delay & RD (~0)) != RD (O7)))) 3215 if ((delay & RS1 (~0)) == RS1 (O7) 3217 && (delay & RS2 (~0)) == RS2 (O7))) 3236 == (INSN_OR | RD (O7) | RS2 (G0)))) 3246 != (INSN_OR | RS1 (O7) | RS2 (G0))) 3257 || reg == G0 || reg == O7)
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/openbsd/gnu/usr.bin/binutils/bfd/ |
H A D | elf64-sparc.c | 2521 #define O7 15 macro 2544 && (y & RD(~0)) == RD(O7))) 2545 && (y & RS1(~0)) != RS1(O7) 2547 || (y & RS2(~0)) != RS2(O7))) 2573 == (INSN_OR | RD(O7) | RS2(G0))) 2581 != (INSN_OR | RS1(O7) | RS2(G0))) 2594 || reg == G0 || reg == O7)
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H A D | elf32-sparc.c | 2924 #define O7 15 macro 2947 && (y & RD(~0)) == RD(O7))) 2948 && (y & RS1(~0)) != RS1(O7) 2950 || (y & RS2(~0)) != RS2(O7))) 2976 == (INSN_OR | RD(O7) | RS2(G0))) 2984 != (INSN_OR | RS1(O7) | RS2(G0))) 2997 || reg == G0 || reg == O7)
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/openbsd/gnu/usr.bin/binutils-2.17/bfd/ |
H A D | elfxx-sparc.c | 3369 #define O7 15 in _bfd_sparc_elf_relocate_section() macro 3392 && (y & RD(~0)) == RD(O7))) in _bfd_sparc_elf_relocate_section() 3393 && (y & RS1(~0)) != RS1(O7) in _bfd_sparc_elf_relocate_section() 3395 || (y & RS2(~0)) != RS2(O7))) in _bfd_sparc_elf_relocate_section() 3422 == (INSN_OR | RD(O7) | RS2(G0))) in _bfd_sparc_elf_relocate_section() 3430 != (INSN_OR | RS1(O7) | RS2(G0))) in _bfd_sparc_elf_relocate_section() 3443 || reg == G0 || reg == O7) in _bfd_sparc_elf_relocate_section()
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/openbsd/gnu/llvm/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 64 SP::O4, SP::O5, SP::O6, SP::O7,
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/openbsd/gnu/llvm/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 148 Sparc::O4, Sparc::O5, Sparc::O6, Sparc::O7, 478 else if (Reg >= Sparc::O0 && Reg <= Sparc::O7) in MorphToIntPairReg()
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