/openbsd/gnu/llvm/llvm/utils/TableGen/ |
H A D | AsmWriterInst.h | 35 } OperandType; member 54 AsmWriterOperand(OpType op = isLiteralTextOperand):OperandType(op) {} in OperandType() function 58 : OperandType(op), Str(LitStr) {} in OperandType() function 63 : OperandType(op), MIOpNo(_MIOpNo), Str(Printer), MiModifier(Modifier), in OperandType() function 67 if (OperandType != Other.OperandType || Str != Other.Str) return true; 68 if (OperandType == isMachineInstrOperand) 100 Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand) in AddLiteralString()
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H A D | AsmWriterInst.cpp | 25 if (OperandType == isLiteralTextOperand) { in getCode() 31 if (OperandType == isLiteralStatementOperand) in getCode() 181 OpInfo.OperandType == "MCOI::OPERAND_PCREL"); in AsmWriterInst()
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H A D | WebAssemblyDisassemblerEmitter.cpp | 118 assert(Op.OperandType != "MCOI::OPERAND_UNKNOWN"); in emitWebAssemblyDisassemblerTables() 119 CurOperandList.push_back(Op.OperandType); in emitWebAssemblyDisassemblerTables()
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H A D | CodeGenInstruction.cpp | 82 std::string OperandType = "OPERAND_UNKNOWN"; in CGIOperandList() local 88 OperandType = std::string(Rec->getValueAsString("OperandType")); in CGIOperandList() 93 OperandType = std::string(Rec->getValueAsString("OperandType")); in CGIOperandList() 121 OperandType = "OPERAND_REGISTER"; in CGIOperandList() 142 OperandNamespace + "::" + OperandType, MIOperandNo, NumOps, MIOpInfo); in CGIOperandList()
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H A D | CodeGenInstruction.h | 100 std::string OperandType; member 128 EncoderMethodNames(MINO), OperandType(OT), MIOperandNo(MION), in OperandInfo()
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H A D | X86DisassemblerTables.cpp | 49 static inline const char* stringForOperandType(OperandType type) { in stringForOperandType() 817 typedef SmallVector<std::pair<OperandEncoding, OperandType>, in emitInstructionInfo() 827 OperandType Type = (OperandType)Operand.type; in emitInstructionInfo() 857 OperandType Type = (OperandType)Operand.type; in emitInstructionInfo()
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/openbsd/gnu/llvm/llvm/include/llvm/MC/ |
H A D | MCInstrDesc.h | 58 enum OperandType { enum 97 uint8_t OperandType; variable 119 return OperandType >= MCOI::OPERAND_FIRST_GENERIC && in isGenericType() 120 OperandType <= MCOI::OPERAND_LAST_GENERIC; in isGenericType() 125 return OperandType - MCOI::OPERAND_FIRST_GENERIC; in getGenericTypeIndex() 129 return OperandType >= MCOI::OPERAND_FIRST_GENERIC_IMM && in isGenericImm() 130 OperandType <= MCOI::OPERAND_LAST_GENERIC_IMM; in isGenericImm() 135 return OperandType - MCOI::OPERAND_FIRST_GENERIC_IMM; in getGenericImmIndex()
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/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyInstrInfo.td | 146 let OperandType = "OPERAND_LOCAL" in 149 let OperandType = "OPERAND_GLOBAL" in { 158 let OperandType = "OPERAND_I32IMM" in 161 let OperandType = "OPERAND_I64IMM" in 164 let OperandType = "OPERAND_F32IMM" in 167 let OperandType = "OPERAND_F64IMM" in 185 let OperandType = "OPERAND_TABLE" in 188 let OperandType = "OPERAND_OFFSET32" in 191 let OperandType = "OPERAND_OFFSET64" in 199 let OperandType = "OPERAND_TAG" in [all …]
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H A D | WebAssemblySetP2AlignOperands.cpp | 65 assert(MI.getDesc().operands()[OperandNo].OperandType == in rewriteP2Align()
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H A D | WebAssemblyMCInstLower.cpp | 198 if (Info.OperandType == WebAssembly::OPERAND_TYPEINDEX) { in lower() 224 } else if (Info.OperandType == WebAssembly::OPERAND_SIGNATURE) { in lower()
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.td | 742 let OperandType = "OPERAND_PCREL"; 758 let OperandType = "OPERAND_PCREL"; 770 let OperandType = "OPERAND_PCREL"; 881 let OperandType = "OPERAND_MEMORY"; 886 let OperandType = "OPERAND_MEMORY"; 893 let OperandType = "OPERAND_MEMORY"; 901 let OperandType = "OPERAND_MEMORY"; 908 let OperandType = "OPERAND_MEMORY"; 915 let OperandType = "OPERAND_MEMORY"; 922 let OperandType = "OPERAND_MEMORY"; [all …]
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/openbsd/gnu/llvm/llvm/tools/llvm-exegesis/lib/ |
H A D | SnippetGenerator.cpp | 241 if (Op.getExplicitOperandInfo().OperandType >= in randomizeMCOperand() 242 MCOI::OperandType::OPERAND_FIRST_TARGET) in randomizeMCOperand() 245 switch (Op.getExplicitOperandInfo().OperandType) { in randomizeMCOperand() 246 case MCOI::OperandType::OPERAND_IMMEDIATE: in randomizeMCOperand() 250 case MCOI::OperandType::OPERAND_REGISTER: { in randomizeMCOperand()
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.h | 116 enum OperandType { enum 120 inline bool isVpred(OperandType op) { in isVpred() 124 return isVpred(static_cast<OperandType>(op)); in isVpred()
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/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
H A D | WebAssemblyMCCodeEmitter.cpp | 97 << int(Info.OperandType) << "\n"); in encodeInstruction() 98 switch (Info.OperandType) { in encodeInstruction() 140 switch (Info.OperandType) { in encodeInstruction()
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/openbsd/gnu/llvm/clang/include/clang/Sema/ |
H A D | DelayedDiagnostic.h | 163 DD.ForbiddenTypeData.OperandType = type.getAsOpaquePtr(); in makeForbiddenType() 218 return QualType::getFromOpaquePtr(ForbiddenTypeData.OperandType); in getForbiddenTypeOperand() 250 void *OperandType; member
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/openbsd/gnu/llvm/llvm/lib/Target/CSKY/MCTargetDesc/ |
H A D | CSKYBaseInfo.h | 62 enum OperandType : unsigned { enum
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/openbsd/gnu/llvm/llvm/lib/DebugInfo/DWARF/ |
H A D | DWARFDebugFrame.cpp | 397 const char *CFIProgram::operandTypeString(CFIProgram::OperandType OT) { in operandTypeString() 423 OperandType Type = CFIP.getOperandTypes()[Opcode][OperandIdx]; in getOperandAsUnsigned() 468 OperandType Type = CFIP.getOperandTypes()[Opcode][OperandIdx]; in getOperandAsSigned() 797 ArrayRef<CFIProgram::OperandType[CFIProgram::MaxOperands]> 799 static OperandType OpTypes[DW_CFA_restore + 1][MaxOperands]; in getOperandTypes() 802 return ArrayRef<OperandType[MaxOperands]>(&OpTypes[0], DW_CFA_restore + 1); in getOperandTypes() 855 return ArrayRef<OperandType[MaxOperands]>(&OpTypes[0], DW_CFA_restore + 1); in getOperandTypes() 864 OperandType Type = getOperandTypes()[Opcode][OperandIdx]; in printOperand()
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/openbsd/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsBaseInfo.h | 132 enum OperandType : unsigned { enum
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.td | 1074 let OperandType = opType#"_INT16"; 1080 let OperandType = opType#"_FP16"; 1092 let OperandType = opType#"_INT16"; 1098 let OperandType = opType#"_FP16"; 1104 let OperandType = opType#"_INT32"; 1110 let OperandType = opType#"_FP32"; 1116 let OperandType = opType#"_V2INT16"; 1122 let OperandType = opType#"_V2FP16"; 1133 let OperandType = opType#"_INT64"; 1138 let OperandType = opType#"_FP64"; [all …]
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/openbsd/gnu/llvm/llvm/tools/llvm-exegesis/lib/X86/ |
H A D | Target.cpp | 228 Op.getExplicitOperandInfo().OperandType == MCOI::OPERAND_PCREL) in isInvalidOpcode() 829 switch (Op.getExplicitOperandInfo().OperandType) { in randomizeTargetMCOperand() 830 case X86::OperandType::OPERAND_ROUNDING_CONTROL: in randomizeTargetMCOperand() 839 .concat(Twine(Op.getExplicitOperandInfo().OperandType))); in randomizeTargetMCOperand() 960 switch (Instr.getPrimaryOperand(Var).getExplicitOperandInfo().OperandType) { in generateInstructionVariants() 965 case X86::OperandType::OPERAND_COND_CODE: { in generateInstructionVariants()
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.h | 71 enum OperandType { enum
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoC.td | 29 let OperandType = "OPERAND_UIMMLOG2XLEN_NONZERO"; 45 let OperandType = "OPERAND_SIMM6"; 60 let OperandType = "OPERAND_SIMM6_NONZERO"; 73 let OperandType = "OPERAND_ZERO"; 111 let OperandType = "OPERAND_UIMM7_LSB00"; 127 let OperandType = "OPERAND_UIMM8_LSB00"; 143 let OperandType = "OPERAND_UIMM8_LSB000"; 167 let OperandType = "OPERAND_PCREL"; 207 let OperandType = "OPERAND_SIMM10_LSB0000_NONZERO"; 230 let OperandType = "OPERAND_PCREL";
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/openbsd/gnu/llvm/llvm/include/llvm/DebugInfo/DWARF/ |
H A D | DWARFDebugFrame.h | 504 enum OperandType { enum 518 static const char *operandTypeString(OperandType OT); 522 static ArrayRef<OperandType[MaxOperands]> getOperandTypes();
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/openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/AsmParser/ |
H A D | WebAssemblyAsmTypeCheck.cpp | 335 if (Op.OperandType == MCOI::OPERAND_REGISTER) { in typeCheck() 344 assert(Op.OperandType == MCOI::OPERAND_REGISTER && "Register expected"); in typeCheck()
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/openbsd/gnu/llvm/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiMCTargetDesc.cpp | 105 if (Info->get(Inst.getOpcode()).operands()[0].OperandType == in evaluateBranch()
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