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Searched refs:PACKET3_WRITE_DATA (Results 1 – 18 of 18) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dsi_enums.h204 #define PACKET3_WRITE_DATA 0x37 macro
H A Dnvd.h88 #define PACKET3_WRITE_DATA 0x37 macro
H A Dsoc15d.h115 #define PACKET3_WRITE_DATA 0x37 macro
H A Dvid.h141 #define PACKET3_WRITE_DATA 0x37 macro
H A Dcikd.h259 #define PACKET3_WRITE_DATA 0x37 macro
H A Dgfx_v8_0.c891 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v8_0_ring_test_ib()
5161 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
5169 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
5177 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
5185 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_gds_switch()
6273 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_fence_kiq()
6282 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_fence_kiq()
6391 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v8_0_ring_emit_wreg()
7189 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce)); in gfx_v8_0_ring_emit_ce_meta()
7222 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_de)); in gfx_v8_0_ring_emit_de_meta()
H A Dgfx_v7_0.c3213 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_wreg()
4043 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
4051 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
4059 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
4067 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
H A Dgfx_v9_4_3.c216 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_4_3_write_data_to_reg()
304 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v9_4_3_ring_test_ib()
2632 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_4_3_ring_emit_fence_kiq()
2641 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_4_3_ring_emit_fence_kiq()
2683 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_4_3_ring_emit_wreg()
H A Dgfx_v9_0.c963 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_write_data_to_reg()
1047 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v9_0_ring_test_ib()
5395 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_ring_emit_fence_kiq()
5404 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_ring_emit_fence_kiq()
5443 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v9_0_ring_emit_ce_meta()
5556 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v9_0_ring_emit_de_meta()
5673 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_ring_emit_wreg()
H A Dgfx_v11_0.c291 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v11_0_write_data_to_reg()
408 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v11_0_ring_test_ib()
5443 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v11_0_ring_emit_fence_kiq()
5452 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v11_0_ring_emit_fence_kiq()
5613 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v11_0_ring_emit_de_meta()
5671 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v11_0_ring_emit_wreg()
H A Dgfx_v10_0.c3736 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_write_data_to_reg()
3845 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v10_0_ring_test_ib()
8444 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_ring_emit_fence_kiq()
8453 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_ring_emit_fence_kiq()
8601 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v10_0_ring_emit_ce_meta()
8652 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v10_0_ring_emit_de_meta()
8710 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_ring_emit_wreg()
H A Dsid.h1699 #define PACKET3_WRITE_DATA 0x37 macro
H A Dgfx_v6_0.c2325 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v6_0_ring_emit_wreg()
/openbsd/sys/dev/pci/drm/radeon/
H A Dsi.c3421 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in si_ring_ib_execute()
4591 case PACKET3_WRITE_DATA: in si_vm_packet3_gfx_check()
4694 case PACKET3_WRITE_DATA: in si_vm_packet3_compute_check()
5079 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in si_vm_flush()
5094 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in si_vm_flush()
5102 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in si_vm_flush()
H A Dnid.h1191 #define PACKET3_WRITE_DATA 0x37 macro
H A Dsid.h1636 #define PACKET3_WRITE_DATA 0x37 macro
H A Dcik.c3741 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_ring_ib_execute()
5682 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_vm_flush()
5696 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_vm_flush()
5703 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 6)); in cik_vm_flush()
5714 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_vm_flush()
5725 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in cik_vm_flush()
H A Dcikd.h1727 #define PACKET3_WRITE_DATA 0x37 macro