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Searched refs:PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN__SHIFT (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h589 #define PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN__SHIFT 0x0000000c macro
H A Dbif_4_1_sh_mask.h3544 #define PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN__SHIFT 0xc macro
H A Dbif_5_0_sh_mask.h3994 #define PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN__SHIFT 0xc macro