Home
last modified time | relevance | path

Searched refs:PB0_GLB_CTRL_REG3__RXDBG_SEL_MASK (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h606 #define PB0_GLB_CTRL_REG3__RXDBG_SEL_MASK 0x0000001fL macro
H A Dbif_4_1_sh_mask.h3533 #define PB0_GLB_CTRL_REG3__RXDBG_SEL_MASK 0x1f macro
H A Dbif_5_0_sh_mask.h3983 #define PB0_GLB_CTRL_REG3__RXDBG_SEL_MASK 0x1f macro