1 /* $OpenBSD: qsphyreg.h,v 1.4 2008/06/26 05:42:16 ray Exp $ */ 2 /* $NetBSD: qsphyreg.h,v 1.1 1998/08/11 00:01:03 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _DEV_MII_QSPHYREG_H_ 35 #define _DEV_MII_QSPHYREG_H_ 36 37 /* 38 * Register definitions for the Quality Semiconductor QS6612 39 * Further documentation can be found at: 40 * http://www.qualitysemi.com/products/network.html 41 */ 42 43 #define MII_QSPHY_MCTL 0x11 /* Mode control */ 44 #define MCTL_T4PRE 0x1000 /* 100baseT4 interface present */ 45 #define MCTL_BTEXT 0x0800 /* reduce 10baseT squelch level */ 46 #define MCTL_FACTTEST 0x0100 /* factory test mode */ 47 #define MCTL_PHYADDRMASK 0x00f8 /* PHY address */ 48 #define MCTL_FACTTEST2 0x0004 /* another factory test mode */ 49 #define MCTL_NLPDIS 0x0002 /* disable link pulse tx */ 50 #define MCTL_SQEDIS 0x0001 /* disable SQE */ 51 52 #define MII_QSPHY_ISRC 0x1d /* Interrupt source */ 53 #define MII_QSPHY_IMASK 0x1e /* Interrupt mask */ 54 #define IMASK_TLINTR 0x8000 /* ThunderLAN interrupt mode */ 55 #define IMASK_ANCPL 0x0040 /* autonegotiation complete */ 56 #define IMASK_RFD 0x0020 /* remote fault detected */ 57 #define IMASK_LD 0x0010 /* link down */ 58 #define IMASK_ANLPA 0x0008 /* autonegotiation LP ACK */ 59 #define IMASK_PDT 0x0004 /* parallel detection fault */ 60 #define IMASK_ANPR 0x0002 /* autonegotiation page received */ 61 #define IMASK_REF 0x0001 /* receive error counter full */ 62 63 #define MII_QSPHY_PCTL 0x1f /* PHY control */ 64 #define PCTL_RXERDIS 0x2000 /* receive error counter disable */ 65 #define PCTL_ANC 0x1000 /* autonegotiation complete */ 66 #define PCTL_RLBEN 0x0200 /* remote loopback enable */ 67 #define PCTL_DCREN 0x0100 /* DC restoration enable */ 68 #define PCTL_4B5BEN 0x0040 /* 4b/5b encoding */ 69 #define PCTL_PHYISO 0x0020 /* isolate PHY */ 70 #define PCTL_OPMASK 0x001c /* operation mode mask */ 71 #define PCTL_AN 0x0000 /* autonegotiation in-progress */ 72 #define PCTL_10_T 0x0004 /* 10baseT */ 73 #define PCTL_100_TX 0x0008 /* 100baseTX */ 74 #define PCTL_100_T4 0x0010 /* 100baseT4 */ 75 #define PCTL_10_T_FDX 0x0014 /* 10baseT-FDX */ 76 #define PCTL_100_TX_FDX 0x0018 /* 100baseTX-FDX */ 77 #define PCTL_MLT3DIS 0x0002 /* disable MLT3 */ 78 #define PCTL_SRCDIS 0x0001 /* disable scrambling */ 79 80 #endif /* _DEV_MII_QSPHYREG_H_ */ 81