1 /* 2 * THIS FILE IS AUTOMATICALLY GENERATED 3 * DONT EDIT THIS FILE 4 */ 5 6 /* $OpenBSD: cn30xxpipreg.h,v 1.9 2022/12/28 01:39:21 yasuoka Exp $ */ 7 8 /* 9 * Copyright (c) 2007 Internet Initiative Japan, Inc. 10 * All rights reserved. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* 35 * Cavium Networks OCTEON CN30XX Hardware Reference Manual 36 * CN30XX-HM-1.0 37 * 7.8 PIP Registers 38 */ 39 40 #ifndef _CN30XXPIPREG_H_ 41 #define _CN30XXPIPREG_H_ 42 43 #define PIP_BIST_STATUS 0x00011800a0000000ULL 44 #define PIP_INT_REG 0x00011800a0000008ULL 45 #define PIP_INT_EN 0x00011800a0000010ULL 46 #define PIP_STAT_CTL 0x00011800a0000018ULL 47 #define PIP_GBL_CTL 0x00011800a0000020ULL 48 #define PIP_GBL_CFG 0x00011800a0000028ULL 49 #define PIP_SOFT_RST 0x00011800a0000030ULL 50 #define PIP_IP_OFFSET 0x00011800a0000060ULL 51 #define PIP_TAG_SECRET 0x00011800a0000068ULL 52 #define PIP_TAG_MASK 0x00011800a0000070ULL 53 #define PIP_DEC_IPSEC0 0x00011800a0000080ULL 54 #define PIP_DEC_IPSEC1 0x00011800a0000088ULL 55 #define PIP_DEC_IPSEC2 0x00011800a0000090ULL 56 #define PIP_DEC_IPSEC3 0x00011800a0000098ULL 57 #define PIP_RAW_WORD 0x00011800a00000b0ULL 58 #define PIP_QOS_VLAN0 0x00011800a00000c0ULL 59 #define PIP_QOS_VLAN1 0x00011800a00000c8ULL 60 #define PIP_QOS_VLAN2 0x00011800a00000d0ULL 61 #define PIP_QOS_VLAN3 0x00011800a00000d8ULL 62 #define PIP_QOS_VLAN4 0x00011800a00000e0ULL 63 #define PIP_QOS_VLAN5 0x00011800a00000e8ULL 64 #define PIP_QOS_VLAN6 0x00011800a00000f0ULL 65 #define PIP_QOS_VLAN7 0x00011800a00000f8ULL 66 #define PIP_QOS_WATCH0 0x00011800a0000100ULL 67 #define PIP_QOS_WATCH1 0x00011800a0000108ULL 68 #define PIP_QOS_WATCH2 0x00011800a0000110ULL 69 #define PIP_QOS_WATCH3 0x00011800a0000118ULL 70 #define PIP_PRT_CFG0 0x00011800a0000200ULL 71 #define PIP_PRT_CFG1 0x00011800a0000208ULL 72 #define PIP_PRT_CFG2 0x00011800a0000210ULL 73 #define PIP_PRT_CFG32 0x00011800a0000300ULL 74 #define PIP_PRT_TAG0 0x00011800a0000400ULL 75 #define PIP_PRT_TAG1 0x00011800a0000408ULL 76 #define PIP_PRT_TAG2 0x00011800a0000410ULL 77 #define PIP_PRT_TAG32 0x00011800a0000500ULL 78 #define PIP_QOS_DIFF0 0x00011800a0000600ULL 79 /* PIP_QOS_DIFF[1-63] */ 80 /* PIP_STAT[0-9]_PRT{0,1,2,32} */ 81 #define PIP_STAT0_PRT0 0x00011800a0000800ULL 82 #define PIP_STAT0_PRT1 0x00011800a0000850ULL 83 #define PIP_STAT0_PRT2 0x00011800a00008a0ULL 84 #define PIP_STAT0_PRT32 0x00011800a0001200ULL 85 #define PIP_TAG_INC0 0x00011800a0001800ULL 86 /* PIP_TAG_INC[1-63] */ 87 #define PIP_STAT_INB_PKTS0 0x00011800a0001a00ULL 88 #define PIP_STAT_INB_PKTS1 0x00011800a0001a20ULL 89 #define PIP_STAT_INB_PKTS2 0x00011800a0001a40ULL 90 #define PIP_STAT_INB_PKTS32 0x00011800a0001e00ULL 91 #define PIP_STAT_INB_OCTS0 0x00011800a0001a08ULL 92 #define PIP_STAT_INB_OCTS1 0x00011800a0001a28ULL 93 #define PIP_STAT_INB_OCTS2 0x00011800a0001a48ULL 94 #define PIP_STAT_INB_OCTS32 0x00011800a0001e08ULL 95 #define PIP_STAT_INB_ERRS0 0x00011800a0001a10ULL 96 #define PIP_STAT_INB_ERRS1 0x00011800a0001a30ULL 97 #define PIP_STAT_INB_ERRS2 0x00011800a0001a50ULL 98 #define PIP_STAT_INB_ERRS32 0x00011800a0001e10ULL 99 100 #define PIP_BASE 0x00011800a0000000ULL 101 #define PIP_SIZE 0x1e50ULL 102 103 #define PIP_STAT_SIZE 0x50 104 #define PIP_STAT_BASE(i) (0x800 + PIP_STAT_SIZE * (i)) 105 106 #define PIP_STAT0_PRT 0x00 107 #define PIP_STAT1_PRT 0x08 108 #define PIP_STAT2_PRT 0x10 109 #define PIP_STAT3_PRT 0x18 110 #define PIP_STAT4_PRT 0x20 111 #define PIP_STAT5_PRT 0x28 112 #define PIP_STAT6_PRT 0x30 113 #define PIP_STAT7_PRT 0x38 114 #define PIP_STAT8_PRT 0x40 115 #define PIP_STAT9_PRT 0x48 116 117 #define PIP_BIST_STATUS_OFFSET 0x0ULL 118 #define PIP_INT_REG_OFFSET 0x8ULL 119 #define PIP_INT_EN_OFFSET 0x10ULL 120 #define PIP_STAT_CTL_OFFSET 0x18ULL 121 #define PIP_GBL_CTL_OFFSET 0x20ULL 122 #define PIP_GBL_CFG_OFFSET 0x28ULL 123 #define PIP_SOFT_RST_OFFSET 0x30ULL 124 #define PIP_IP_OFFSET_OFFSET 0x60ULL 125 #define PIP_TAG_SECRET_OFFSET 0x68ULL 126 #define PIP_TAG_MASK_OFFSET 0x70ULL 127 #define PIP_DEC_IPSEC0_OFFSET 0x80ULL 128 #define PIP_DEC_IPSEC1_OFFSET 0x88ULL 129 #define PIP_DEC_IPSEC2_OFFSET 0x90ULL 130 #define PIP_DEC_IPSEC3_OFFSET 0x98ULL 131 #define PIP_RAW_WORD_OFFSET 0xb0ULL 132 #define PIP_QOS_VLAN0_OFFSET 0xc0ULL 133 #define PIP_QOS_VLAN1_OFFSET 0xc8ULL 134 #define PIP_QOS_VLAN2_OFFSET 0xd0ULL 135 #define PIP_QOS_VLAN3_OFFSET 0xd8ULL 136 #define PIP_QOS_VLAN4_OFFSET 0xe0ULL 137 #define PIP_QOS_VLAN5_OFFSET 0xe8ULL 138 #define PIP_QOS_VLAN6_OFFSET 0xf0ULL 139 #define PIP_QOS_VLAN7_OFFSET 0xf8ULL 140 #define PIP_QOS_WATCH0_OFFSET 0x100ULL 141 #define PIP_QOS_WATCH1_OFFSET 0x108ULL 142 #define PIP_QOS_WATCH2_OFFSET 0x110ULL 143 #define PIP_QOS_WATCH3_OFFSET 0x118ULL 144 #define PIP_PRT_CFG0_OFFSET 0x200ULL 145 #define PIP_PRT_CFG1_OFFSET 0x208ULL 146 #define PIP_PRT_CFG2_OFFSET 0x210ULL 147 #define PIP_PRT_CFG32_OFFSET 0x300ULL 148 #define PIP_PRT_TAG0_OFFSET 0x400ULL 149 #define PIP_PRT_TAG1_OFFSET 0x408ULL 150 #define PIP_PRT_TAG2_OFFSET 0x410ULL 151 #define PIP_PRT_TAG32_OFFSET 0x500ULL 152 #define PIP_QOS_DIFF0_OFFSET 0x600ULL 153 /* PIP_QOS_DIFF[1-63] */ 154 #define PIP_STAT0_PRT_OFFSET(i) (0x800ULL + (i) * 0x50) 155 #define PIP_STAT0_PRT0_OFFSET 0x800ULL 156 #define PIP_STAT0_PRT1_OFFSET 0x850ULL 157 #define PIP_STAT0_PRT2_OFFSET 0x8a0ULL 158 #define PIP_STAT0_PRT32_OFFSET 0x1200ULL 159 #define PIP_STAT0_PRT33_OFFSET 0x1250ULL 160 #define PIP_STAT1_PRT0_OFFSET 0x800ULL 161 #define PIP_STAT1_PRT1_OFFSET 0x850ULL 162 #define PIP_STAT1_PRT2_OFFSET 0x8a0ULL 163 #define PIP_STAT1_PRT32_OFFSET 0x1200ULL 164 #define PIP_STAT1_PRT33_OFFSET 0x1250ULL 165 #define PIP_STAT2_PRT0_OFFSET 0x810ULL 166 #define PIP_STAT2_PRT1_OFFSET 0x860ULL 167 #define PIP_STAT2_PRT2_OFFSET 0x8b0ULL 168 #define PIP_STAT2_PRT32_OFFSET 0x1210ULL 169 #define PIP_STAT2_PRT33_OFFSET 0x1260ULL 170 #define PIP_STAT3_PRT0_OFFSET 0x818ULL 171 #define PIP_STAT3_PRT1_OFFSET 0x868ULL 172 #define PIP_STAT3_PRT2_OFFSET 0x8b8ULL 173 #define PIP_STAT3_PRT32_OFFSET 0x1218ULL 174 #define PIP_STAT3_PRT33_OFFSET 0x1268ULL 175 #define PIP_STAT4_PRT0_OFFSET 0x820ULL 176 #define PIP_STAT4_PRT1_OFFSET 0x870ULL 177 #define PIP_STAT4_PRT2_OFFSET 0x8c0ULL 178 #define PIP_STAT4_PRT32_OFFSET 0x1220ULL 179 #define PIP_STAT4_PRT33_OFFSET 0x1270ULL 180 #define PIP_STAT5_PRT0_OFFSET 0x828ULL 181 #define PIP_STAT5_PRT1_OFFSET 0x878ULL 182 #define PIP_STAT5_PRT2_OFFSET 0x8c8ULL 183 #define PIP_STAT5_PRT32_OFFSET 0x1228ULL 184 #define PIP_STAT5_PRT33_OFFSET 0x1278ULL 185 #define PIP_STAT6_PRT0_OFFSET 0x830ULL 186 #define PIP_STAT6_PRT1_OFFSET 0x880ULL 187 #define PIP_STAT6_PRT2_OFFSET 0x8d0ULL 188 #define PIP_STAT6_PRT32_OFFSET 0x1238ULL 189 #define PIP_STAT6_PRT33_OFFSET 0x1288ULL 190 #define PIP_STAT7_PRT0_OFFSET 0x838ULL 191 #define PIP_STAT7_PRT1_OFFSET 0x888ULL 192 #define PIP_STAT7_PRT2_OFFSET 0x8d8ULL 193 #define PIP_STAT7_PRT32_OFFSET 0x1238ULL 194 #define PIP_STAT7_PRT33_OFFSET 0x1288ULL 195 #define PIP_STAT8_PRT0_OFFSET 0x840ULL 196 #define PIP_STAT8_PRT1_OFFSET 0x890ULL 197 #define PIP_STAT8_PRT2_OFFSET 0x8e0ULL 198 #define PIP_STAT8_PRT32_OFFSET 0x1240ULL 199 #define PIP_STAT8_PRT33_OFFSET 0x1290ULL 200 #define PIP_STAT9_PRT0_OFFSET 0x848ULL 201 #define PIP_STAT9_PRT1_OFFSET 0x898ULL 202 #define PIP_STAT9_PRT2_OFFSET 0x8e8ULL 203 #define PIP_STAT9_PRT32_OFFSET 0x1248ULL 204 #define PIP_STAT9_PRT33_OFFSET 0x1298ULL 205 #define PIP_TAG_INC0_OFFSET 0x1800ULL 206 /* PIP_TAG_INC[1-63] */ 207 #define PIP_STAT_INB_PKTS0_OFFSET 0x1a00ULL 208 #define PIP_STAT_INB_PKTS1_OFFSET 0x1a20ULL 209 #define PIP_STAT_INB_PKTS2_OFFSET 0x1a40ULL 210 #define PIP_STAT_INB_PKTS32_OFFSET 0x1e00ULL 211 #define PIP_STAT_INB_OCTS0_OFFSET 0x1a08ULL 212 #define PIP_STAT_INB_OCTS1_OFFSET 0x1a28ULL 213 #define PIP_STAT_INB_OCTS2_OFFSET 0x1a48ULL 214 #define PIP_STAT_INB_OCTS32_OFFSET 0x1e08ULL 215 #define PIP_STAT_INB_ERRS0_OFFSET 0x1a10ULL 216 #define PIP_STAT_INB_ERRS1_OFFSET 0x1a30ULL 217 #define PIP_STAT_INB_ERRS2_OFFSET 0x1a50ULL 218 #define PIP_STAT_INB_ERRS32_OFFSET 0x1e10ULL 219 #define PIP_STAT_INB_ERRS33_OFFSET 0x1e30ULL 220 221 /* 222 * PIP_BIST_STATUS 223 */ 224 #define PIP_BIST_STATUS_63_13 0xfffffffffffc0000ULL 225 #define PIP_BIST_STATUS_BIST 0x000000000003ffffULL 226 227 /* 228 * PIP_INT_REG 229 */ 230 #define PIP_INT_REG_63_9 0xfffffffffffffe00ULL 231 #define PIP_INT_REG_BEPERR 0x0000000000000100ULL 232 #define PIP_INT_REG_FEPERR 0x0000000000000080ULL 233 #define PIP_INT_REG_6 0x0000000000000040ULL 234 #define PIP_INT_REG_SKPRUNT 0x0000000000000020ULL 235 #define PIP_INT_REG_BADTAG 0x0000000000000010ULL 236 #define PIP_INT_REG_PRTNXA 0x0000000000000008ULL 237 #define PIP_INT_REG_2_1 0x00000006 238 #define PIP_INT_REG_PKTDRP 0x00000001 239 240 /* 241 * PIP_INT_EN 242 */ 243 #define PIP_INT_EN_63_9 0xfffffffffffffe00ULL 244 #define PIP_INT_EN_BEPERR 0x0000000000000100ULL 245 #define PIP_INT_EN_FEPERR 0x0000000000000080ULL 246 #define PIP_INT_EN_6 0x0000000000000040ULL 247 #define PIP_INT_EN_SKPRUNT 0x0000000000000020ULL 248 #define PIP_INT_EN_BADTAG 0x0000000000000010ULL 249 #define PIP_INT_EN_PRTNXA 0x0000000000000008ULL 250 #define PIP_INT_EN_2_1 0x00000006 251 #define PIP_INT_EN_PKTDRP 0x00000001 252 253 /* 254 * PIP_STAT_CTL 255 */ 256 #define PIP_STAT_CTL_63_1 0xfffffffffffffffeULL 257 #define PIP_STAT_CTL_RDCLR 0x0000000000000001ULL 258 259 /* 260 * PIP_GBL_CTL 261 */ 262 #define PIP_GBL_CTL_63_17 0xfffffffffffe0000ULL 263 #define PIP_GBL_CTL_IGNRS 0x0000000000010000ULL 264 #define PIP_GBL_CTL_VS_WQE 0x0000000000008000ULL 265 #define PIP_GBL_CTL_VS_QOS 0x0000000000004000ULL 266 #define PIP_GBL_CTL_L2MAL 0x0000000000002000ULL 267 #define PIP_GBL_CTL_TCP_FLAG 0x0000000000001000ULL 268 #define PIP_GBL_CTL_L4_LEN 0x0000000000000800ULL 269 #define PIP_GBL_CTL_L4_CHK 0x0000000000000400ULL 270 #define PIP_GBL_CTL_L4_PRT 0x0000000000000200ULL 271 #define PIP_GBL_CTL_L4_MAL 0x0000000000000100ULL 272 #define PIP_GBL_CTL_7_6 0x00000000000000c0ULL 273 #define PIP_GBL_CTL_IP6_EEXT 0x0000000000000030ULL 274 #define PIP_GBL_CTL_IP4_OPTS 0x0000000000000008ULL 275 #define PIP_GBL_CTL_IP_HOP 0x0000000000000004ULL 276 #define PIP_GBL_CTL_IP_MAL 0x0000000000000002ULL 277 #define PIP_GBL_CTL_IP_CHK 0x0000000000000001ULL 278 279 /* 280 * PIP_GBL_CFG 281 */ 282 /* XXX CN30XX-HM-1.0 says 63_17 is reserved */ 283 #define PIP_GBL_CFG_63_19 0xfffffffffff80000ULL 284 #define PIP_GBL_CFG_TAG_SYN 0x0000000000040000ULL 285 #define PIP_GBL_CFG_IP6_UDP 0x0000000000020000ULL 286 #define PIP_GBL_CFG_MAX_L2 0x0000000000010000ULL 287 #define PIP_GBL_CFG_15_11 0x000000000000f800ULL 288 #define PIP_GBL_CFG_RAW_SHF 0x0000000000000700ULL 289 #define PIP_GBL_CFG_7_3 0x00000000000000f8ULL 290 #define PIP_GBL_CFG_NIP_SHF_MASK 0x0000000000000007ULL 291 #define PIP_GBL_CFG_NIP_SHF_SHIFT 0 292 293 /* 294 * PIP_SFT_RST 295 */ 296 #define PIP_SFT_RST_63_17 0xfffffffffffffffeULL 297 #define PIP_SFT_RST_RST 0x0000000000000001ULL 298 299 /* 300 * PIP_IP_OFFSET 301 */ 302 #define PIP_IP_OFFSET_63_3 0xfffffffffffffff8ULL 303 /* PIP_IP_OFFSET_OFFSET is defined above - conflict! */ 304 #define PIP_IP_OFFSET_MASK_OFFSET 0x0000000000000007ULL 305 306 /* 307 * PIP_TAG_SECRET 308 */ 309 #define PIP_TAG_SECRET_63_3 0xffffffff00000000ULL 310 #define PIP_TAG_SECRET_DST 0x00000000ffff0000ULL 311 #define PIP_TAG_SECRET_SRC 0x000000000000ffffULL 312 313 /* 314 * PIP_TAG_MASK 315 */ 316 #define PIP_TAG_MASK_63_16 0xffffffffffff0000ULL 317 #define PIP_TAG_MASK_MASK 0x000000000000ffffULL 318 319 /* 320 * PIP_DEC_IPSECN 321 */ 322 #define PIP_DEC_IPSECN_63_18 0xfffffffffffc0000ULL 323 #define PIP_DEC_IPSECN_TCP 0x0000000000020000ULL 324 #define PIP_DEC_IPSECN_UDP 0x0000000000010000ULL 325 #define PIP_DEC_IPSECN_DPRT 0x000000000000ffffULL 326 327 /* 328 * PIP_RAW_WORD 329 */ 330 #define PIP_RAW_WORD_63_56 0xff00000000000000ULL 331 #define PIP_RAW_WORD_WORD 0x00ffffffffffffffULL 332 333 /* 334 * PIP_QOS_VLAN 335 */ 336 #define PIP_QOS_VLAN_63_3 0xfffffffffffffff8ULL 337 #define PIP_QOS_VLAN_QOS 0x0000000000000007ULL 338 339 /* 340 * PIP_QOS_WATCHN 341 */ 342 #define PIP_QOS_WATCHN_63_48 0xffff000000000000ULL 343 #define PIP_QOS_WATCHN_MASK 0x0000ffff00000000ULL 344 #define PIP_QOS_WATCHN_31_28 0x00000000f0000000ULL 345 #define PIP_QOS_WATCHN_GRP 0x000000000f000000ULL 346 #define PIP_QOS_WATCHN_23 0x0000000000800000ULL 347 #define PIP_QOS_WATCHN_WATCHER 0x0000000000700000ULL 348 #define PIP_QOS_WATCHN_19_18 0x00000000000c0000ULL 349 #define PIP_QOS_WATCHN_TYPE 0x0000000000030000ULL 350 #define PIP_QOS_WATCHN_15_0 0x000000000000ffffULL 351 352 /* 353 * PIP_PRT_CFGN 354 */ 355 #define PIP_PRT_CFGN_63_37 0xffffffe000000000ULL 356 #define PIP_PRT_CFGN_RAWDRP 0x0000001000000000ULL 357 #define PIP_PRT_CFGN_TAG_INC 0x0000000c00000000ULL 358 #define PIP_PRT_CFGN_DYN_RS 0x0000000200000000ULL 359 #define PIP_PRT_CFGN_INST_HDR 0x0000000100000000ULL 360 #define PIP_PRT_CFGN_GRP_WAT 0x00000000f0000000ULL 361 #define PIP_PRT_CFGN_27 0x0000000008000000ULL 362 #define PIP_PRT_CFGN_QOS 0x0000000007000000ULL 363 #define PIP_PRT_CFGN_QOS_WAT 0x0000000000f00000ULL 364 #define PIP_PRT_CFGN_19 0x0000000000080000ULL 365 #define PIP_PRT_CFGN_SPARE 0x0000000000040000ULL 366 #define PIP_PRT_CFGN_QOS_DIFF 0x0000000000020000ULL 367 #define PIP_PRT_CFGN_QOS_VLAN 0x0000000000010000ULL 368 #define PIP_PRT_CFGN_15_13 0x000000000000e000ULL 369 #define PIP_PRT_CFGN_CRC_EN 0x0000000000001000ULL 370 #define PIP_PRT_CFGN_11_10 0x0000000000000c00ULL 371 #define PIP_PRT_CFGN_MODE 0x0000000000000300ULL 372 #define PIP_PRT_CFGN_MODE_SHIFT 8 373 #define PIP_PORT_CFG_MODE_NONE (0ULL << PIP_PRT_CFGN_MODE_SHIFT) 374 #define PIP_PORT_CFG_MODE_L2 (1ULL << PIP_PRT_CFGN_MODE_SHIFT) 375 #define PIP_PORT_CFG_MODE_IP (2ULL << PIP_PRT_CFGN_MODE_SHIFT) 376 #define PIP_PORT_CFG_MODE_PCI (3ULL << PIP_PRT_CFGN_MODE_SHIFT) 377 #define PIP_PRT_CFGN_7 0x0000000000000080ULL 378 #define PIP_PRT_CFGN_SKIP 0x000000000000007fULL 379 380 /* 381 * PIP_PRT_TAGN 382 */ 383 #define PIP_PRT_TAGN_63_40 0xffffff0000000000ULL 384 #define PIP_PRT_TAGN_GRPTAGBASE 0x000000f000000000ULL 385 #define PIP_PRT_TAGN_GRPTAGMASK 0x0000000f00000000ULL 386 #define PIP_PRT_TAGN_GRPTAG 0x0000000080000000ULL 387 #define PIP_PRT_TAGN_SPARE 0x0000000040000000ULL 388 #define PIP_PRT_TAGN_TAG_MODE 0x0000000030000000ULL 389 #define PIP_PRT_TAGN_INC_VS 0x000000000c000000ULL 390 #define PIP_PRT_TAGN_INC_VLAN 0x0000000002000000ULL 391 #define PIP_PRT_TAGN_INC_PRT 0x0000000001000000ULL 392 #define PIP_PRT_TAGN_IP6_DPRT 0x0000000000800000ULL 393 #define PIP_PRT_TAGN_IP4_DPRT 0x0000000000400000ULL 394 #define PIP_PRT_TAGN_IP6_SPRT 0x0000000000200000ULL 395 #define PIP_PRT_TAGN_IP4_SPRT 0x0000000000100000ULL 396 #define PIP_PRT_TAGN_IP6_NXTH 0x0000000000080000ULL 397 #define PIP_PRT_TAGN_IP4_PCTL 0x0000000000040000ULL 398 #define PIP_PRT_TAGN_IP6_DST 0x0000000000020000ULL 399 #define PIP_PRT_TAGN_IP4_SRC 0x0000000000010000ULL 400 #define PIP_PRT_TAGN_IP6_SRC 0x0000000000008000ULL 401 #define PIP_PRT_TAGN_IP4_DST 0x0000000000004000ULL 402 #define PIP_PRT_TAGN_TCP6_TAG 0x0000000000003000ULL 403 #define PIP_PRT_TAGN_TCP6_TAG 0x0000000000003000ULL 404 #define PIP_PRT_TAGN_TCP6_TAG_SHIFT 12 405 #define PIP_PRT_TAGN_TCP6_TAG_ORDERED (0ULL << PIP_PRT_TAGN_TCP6_TAG_SHIFT) 406 #define PIP_PRT_TAGN_TCP6_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_TCP6_TAG_SHIFT) 407 #define PIP_PRT_TAGN_TCP6_TAG_NULL (2ULL << PIP_PRT_TAGN_TCP6_TAG_SHIFT) 408 #define PIP_PRT_TAGN_TCP6_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_TCP6_TAG_SHIFT) 409 #define PIP_PRT_TAGN_TCP4_TAG 0x0000000000000c00ULL 410 #define PIP_PRT_TAGN_TCP4_TAG_SHIFT 10 411 #define PIP_PRT_TAGN_TCP4_TAG_ORDERED (0ULL << PIP_PRT_TAGN_TCP4_TAG_SHIFT) 412 #define PIP_PRT_TAGN_TCP4_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_TCP4_TAG_SHIFT) 413 #define PIP_PRT_TAGN_TCP4_TAG_NULL (2ULL << PIP_PRT_TAGN_TCP4_TAG_SHIFT) 414 #define PIP_PRT_TAGN_TCP4_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_TCP4_TAG_SHIFT) 415 #define PIP_PRT_TAGN_IP6_TAG 0x0000000000000300ULL 416 #define PIP_PRT_TAGN_IP6_TAG_SHIFT 8 417 #define PIP_PRT_TAGN_IP6_TAG_ORDERED (0ULL << PIP_PRT_TAGN_IP6_TAG_SHIFT) 418 #define PIP_PRT_TAGN_IP6_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_IP6_TAG_SHIFT) 419 #define PIP_PRT_TAGN_IP6_TAG_NULL (2ULL << PIP_PRT_TAGN_IP6_TAG_SHIFT) 420 #define PIP_PRT_TAGN_IP6_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_IP6_TAG_SHIFT) 421 #define PIP_PRT_TAGN_IP4_TAG 0x00000000000000c0ULL 422 #define PIP_PRT_TAGN_IP4_TAG_SHIFT 6 423 #define PIP_PRT_TAGN_IP4_TAG_ORDERED (0ULL << PIP_PRT_TAGN_IP4_TAG_SHIFT) 424 #define PIP_PRT_TAGN_IP4_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_IP4_TAG_SHIFT) 425 #define PIP_PRT_TAGN_IP4_TAG_NULL (2ULL << PIP_PRT_TAGN_IP4_TAG_SHIFT) 426 #define PIP_PRT_TAGN_IP4_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_IP4_TAG_SHIFT) 427 #define PIP_PRT_TAGN_NON_TAG 0x0000000000000030ULL 428 #define PIP_PRT_TAGN_NON_TAG_SHIFT 4 429 #define PIP_PRT_TAGN_NON_TAG_ORDERED (0ULL << PIP_PRT_TAGN_NON_TAG_SHIFT) 430 #define PIP_PRT_TAGN_NON_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_NON_TAG_SHIFT) 431 #define PIP_PRT_TAGN_NON_TAG_NULL (2ULL << PIP_PRT_TAGN_NON_TAG_SHIFT) 432 #define PIP_PRT_TAGN_NON_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_NON_TAG_SHIFT) 433 #define PIP_PRT_TAGN_GRP 0x000000000000000fULL 434 435 /* 436 * PIP_QOS_DIFFN 437 */ 438 #define PIP_QOS_DIFF_63_3 0xfffffffffffffff8ULL 439 #define PIP_QOS_DIFF_QOS 0x0000000000000007ULL 440 441 /* 442 * PIP_TAG_INCN 443 */ 444 #define PIP_TAG_INCN_63_8 0xffffffffffffff00ULL 445 #define PIP_TAG_INCN_EN 0x00000000000000ffULL 446 447 /* 448 * PIP_STAT0_PRTN 449 */ 450 #define PIP_STAT0_PRTN_DRP_PKTS 0xffffffff00000000ULL 451 #define PIP_STAT0_PRTN_DRP_OCTS 0x00000000ffffffffULL 452 453 /* 454 * PIP_STAT1_PRTN 455 */ 456 #define PIP_STAT1_PRTN_63_48 0xffff000000000000ULL 457 #define PIP_STAT1_PRTN_OCTS 0x0000ffffffffffffULL 458 459 /* 460 * PIP_STAT2_PRTN 461 */ 462 #define PIP_STAT2_PRTN_PKTS 0xffffffff00000000ULL 463 #define PIP_STAT2_PRTN_RAW 0x00000000ffffffffULL 464 465 /* 466 * PIP_STAT3_PRTN 467 */ 468 #define PIP_STAT3_PRTN_BCST 0xffffffff00000000ULL 469 #define PIP_STAT3_PRTN_MCST 0x00000000ffffffffULL 470 471 /* 472 * PIP_STAT4_PRTN 473 */ 474 #define PIP_STAT4_PRTN_H65TO127 0xffffffff00000000ULL 475 #define PIP_STAT4_PRTN_H64 0x00000000ffffffffULL 476 477 /* 478 * PIP_STAT5_PRTN 479 */ 480 #define PIP_STAT5_PRTN_H256TO511 0xffffffff00000000ULL 481 #define PIP_STAT5_PRTN_H128TO255 0x00000000ffffffffULL 482 483 /* 484 * PIP_STAT6_PRTN 485 */ 486 #define PIP_STAT6_PRTN_H1024TO1518 0xffffffff00000000ULL 487 #define PIP_STAT6_PRTN_H512TO1023 0x00000000ffffffffULL 488 489 /* 490 * PIP_STAT7_PRTN 491 */ 492 #define PIP_STAT7_PRTN_FCS 0xffffffff00000000ULL 493 #define PIP_STAT7_PRTN_H1519 0x00000000ffffffffULL 494 495 /* 496 * PIP_STAT8_PRTN 497 */ 498 #define PIP_STAT8_PRTN_FRAG 0xffffffff00000000ULL 499 #define PIP_STAT8_PRTN_UNDERSZ 0x00000000ffffffffULL 500 501 /* 502 * PIP_STAT9_PRTN 503 */ 504 #define PIP_STAT9_PRTN_JABBER 0xffffffff00000000ULL 505 #define PIP_STAT9_PRTN_OVERSZ 0x00000000ffffffffULL 506 507 /* 508 * PIP_STAT_INB_PKTN 509 */ 510 #define PIP_STAT_INB_PKTSN 0xffffffff00000000ULL 511 #define PIP_STAT_INB_PKTSN_PKTS 0x00000000ffffffffULL 512 513 /* 514 * PIP_STAT_INB_OCTSN 515 */ 516 #define PIP_STAT_INB_OCTSN 0xffff000000000000ULL 517 #define PIP_STAT_INB_OCTSN_OCTS 0x0000ffffffffffffULL 518 519 /* 520 * PIP_STAT_INB_ERRS 521 */ 522 #define PIP_STAT_INB_ERRSN 0xffffffffffff0000ULL 523 #define PIP_STAT_INB_ERRSN_OCTS 0x000000000000ffffULL 524 525 /* 526 * Work-Queue Entry Format 527 */ 528 /* WORD0 */ 529 #define PIP_WQE_WORD0_HW_CSUM 0xffff000000000000ULL 530 #define PIP_WQE_WORD0_47_40 0x0000ff0000000000ULL 531 #define PIP_WQE_WORD0_POW_NEXT_PTR 0x000000ffffffffffULL 532 533 /* WORD 1 */ 534 #define PIP_WQE_WORD1_LEN 0xffff000000000000ULL 535 #define PIP_WQE_WORD1_IPRT 0x0000fc0000000000ULL 536 #define PIP_WQE_WORD1_QOS 0x0000038000000000ULL 537 #define PIP_WQE_WORD1_GRP 0x0000007800000000ULL 538 #define PIP_WQE_WORD1_TT 0x0000000700000000ULL 539 #define PIP_WQE_WORD1_TAG 0x00000000ffffffffULL 540 541 /* WORD 2 */ 542 #define PIP_WQE_WORD2_RAWFULL_BUFS 0xff00000000000000ULL 543 #define PIP_WQE_WORD2_RAWFULL_PIP_RAW_WORD 0x00ffffffffffffffULL 544 545 #define PIP_WQE_WORD2_IP_BUFS 0xff00000000000000ULL 546 #define PIP_WQE_WORD2_IP_BUFS_SHIFT 56 547 #define PIP_WQE_WORD2_IP_OFFSET 0x00ff000000000000ULL 548 #define PIP_WQE_WORD2_IP_OFFSET_SHIFT 48 549 #define PIP_WQE_WORD2_IP_VV 0x0000800000000000ULL 550 #define PIP_WQE_WORD2_IP_VS 0x0000400000000000ULL 551 #define PIP_WQE_WORD2_IP_45 0x0000200000000000ULL 552 #define PIP_WQE_WORD2_IP_VC 0x0000100000000000ULL 553 #define PIP_WQE_WORD2_IP_VLAN_ID 0x00000fff00000000ULL 554 #define PIP_WQE_WORD2_IP_31_20 0x00000000fff00000ULL 555 #define PIP_WQE_WORD2_IP_CO 0x0000000000080000ULL 556 #define PIP_WQE_WORD2_IP_TU 0x0000000000040000ULL 557 #define PIP_WQE_WORD2_IP_SE 0x0000000000020000ULL 558 #define PIP_WQE_WORD2_IP_V6 0x0000000000010000ULL 559 #define PIP_WQE_WORD2_IP_15 0x0000000000008000ULL 560 #define PIP_WQE_WORD2_IP_LE 0x0000000000004000ULL 561 #define PIP_WQE_WORD2_IP_FR 0x0000000000002000ULL 562 #define PIP_WQE_WORD2_IP_IE 0x0000000000001000ULL 563 #define PIP_WQE_WORD2_IP_B 0x0000000000000800ULL 564 #define PIP_WQE_WORD2_IP_M 0x0000000000000400ULL 565 #define PIP_WQE_WORD2_IP_NI 0x0000000000000200ULL 566 #define PIP_WQE_WORD2_IP_RE 0x0000000000000100ULL 567 #define PIP_WQE_WORD2_IP_OPECODE 0x00000000000000ffULL 568 569 #define PIP_WQE_WORD2_NOIP_BUFS 0xff00000000000000ULL 570 #define PIP_WQE_WORD2_NOIP_55_48 0x00ff000000000000ULL 571 #define PIP_WQE_WORD2_NOIP_VV 0x0000800000000000ULL 572 #define PIP_WQE_WORD2_NOIP_VS 0x0000400000000000ULL 573 #define PIP_WQE_WORD2_NOIP_45 0x0000200000000000ULL 574 #define PIP_WQE_WORD2_NOIP_VC 0x0000100000000000ULL 575 #define PIP_WQE_WORD2_NOIP_VLAN_ID 0x00000fff00000000ULL 576 #define PIP_WQE_WORD2_NOIP_31_14 0x00000000ffffc000ULL 577 #define PIP_WQE_WORD2_NOIP_IR 0x0000000000002000ULL 578 #define PIP_WQE_WORD2_NOIP_IA 0x0000000000001000ULL 579 #define PIP_WQE_WORD2_NOIP_B 0x0000000000000800ULL 580 #define PIP_WQE_WORD2_NOIP_M 0x0000000000000400ULL 581 #define PIP_WQE_WORD2_NOIP_NI 0x0000000000000200ULL 582 #define PIP_WQE_WORD2_NOIP_RE 0x0000000000000100ULL 583 #define PIP_WQE_WORD2_NOIP_OPECODE 0x00000000000000ffULL 584 585 /* WORD 3 */ 586 #define PIP_WQE_WORD3_63 0x8000000000000000ULL 587 #define PIP_WQE_WORD3_BACK 0x7800000000000000ULL 588 #define PIP_WQE_WORD3_BACK_SHIFT 59 589 #define PIP_WQE_WORD3_58_56 0x0700000000000000ULL 590 #define PIP_WQE_WORD3_SIZE 0x00ffff0000000000ULL 591 #define PIP_WQE_WORD3_ADDR 0x000000ffffffffffULL 592 593 /* opcode for WORD2[LE] */ 594 #define PIP_WQE_WORD2_LE_OPCODE_MAL 1ULL 595 #define PIP_WQE_WORD2_LE_OPCODE_CSUM 2ULL 596 #define PIP_WQE_WORD2_LE_OPCODE_UDPLEN 3ULL 597 #define PIP_WQE_WORD2_LE_OPCODE_PORT 4ULL 598 #define PIP_WQE_WORD2_LE_OPCODE_XXX_5 5ULL 599 #define PIP_WQE_WORD2_LE_OPCODE_XXX_6 6ULL 600 #define PIP_WQE_WORD2_LE_OPCODE_XXX_7 7ULL 601 #define PIP_WQE_WORD2_LE_OPCODE_FINO 8ULL 602 #define PIP_WQE_WORD2_LE_OPCODE_NOFL 9ULL 603 #define PIP_WQE_WORD2_LE_OPCODE_FINRST 10ULL 604 #define PIP_WQE_WORD2_LE_OPCODE_SYNURG 11ULL 605 #define PIP_WQE_WORD2_LE_OPCODE_SYNRST 12ULL 606 #define PIP_WQE_WORD2_LE_OPCODE_SYNFIN 13ULL 607 608 /* opcode for WORD2[IE] */ 609 #define PIP_WQE_WORD2_IE_OPCODE_NOTIP 1ULL 610 #define PIP_WQE_WORD2_IE_OPCODE_CSUM 2ULL 611 #define PIP_WQE_WORD2_IE_OPCODE_MALHDR 3ULL 612 #define PIP_WQE_WORD2_IE_OPCODE_MAL 4ULL 613 #define PIP_WQE_WORD2_IE_OPCODE_TTL 5ULL 614 #define PIP_WQE_WORD2_IE_OPCODE_OPT 6ULL 615 616 /* opcode for WORD2[RE] */ 617 #define PIP_WQE_WORD2_RE_OPCODE_PARTIAL 1ULL 618 #define PIP_WQE_WORD2_RE_OPCODE_JABBER 2ULL 619 #define PIP_WQE_WORD2_RE_OPCODE_OVRRUN 3ULL 620 #define PIP_WQE_WORD2_RE_OPCODE_OVRSZ 4ULL 621 #define PIP_WQE_WORD2_RE_OPCODE_ALIGN 5ULL 622 #define PIP_WQE_WORD2_RE_OPCODE_FRAG 6ULL 623 #define PIP_WQE_WORD2_RE_OPCODE_GMXFCS 7ULL 624 #define PIP_WQE_WORD2_RE_OPCODE_UDRSZ 8ULL 625 #define PIP_WQE_WORD2_RE_OPCODE_EXTEND 9ULL 626 #define PIP_WQE_WORD2_RE_OPCODE_LENGTH 10ULL 627 #define PIP_WQE_WORD2_RE_OPCODE_MIIRX 11ULL 628 #define PIP_WQE_WORD2_RE_OPCODE_MIISKIP 12ULL 629 #define PIP_WQE_WORD2_RE_OPCODE_MIINBL 13ULL 630 #define PIP_WQE_WORD2_RE_OPCODE_XXX_14 14ULL 631 #define PIP_WQE_WORD2_RE_OPCODE_XXX_15 15ULL 632 #define PIP_WQE_WORD2_RE_OPCODE_XXX_16 16ULL 633 #define PIP_WQE_WORD2_RE_OPCODE_SKIP 17ULL 634 #define PIP_WQE_WORD2_RE_OPCODE_L2MAL 18ULL 635 636 #endif /* _CN30XXPIPREG_H_ */ 637