Searched refs:PIXCLK_RESYNC_CNTL (Results 1 – 3 of 3) sorted by relevance
| /openbsd/sys/dev/pci/drm/amd/display/dc/dce/ |
| H A D | dce_clock_source.h | 42 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, id)
59 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
80 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
89 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
104 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
119 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
134 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
152 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
175 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
222 uint32_t PIXCLK_RESYNC_CNTL; member
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| H A D | dce_clock_source.c | 831 REG_UPDATE_2(PIXCLK_RESYNC_CNTL, in dce112_program_pixel_clk_resync()
835 REG_UPDATE(PIXCLK_RESYNC_CNTL, in dce112_program_pixel_clk_resync()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.h | 181 SRI_ARR_ALPHABET(PIXCLK_RESYNC_CNTL, PHYPLL, index, pllid), \
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