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Searched refs:R15 (Results 1 – 25 of 72) sorted by relevance

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/openbsd/gnu/usr.bin/binutils/gdb/
H A Dm32r-stub.c122 R8, R9, R10, R11, R12, R13, R14, R15, enumerator
251 *ptr++ = hexchars[R15 >> 4]; in handle_exception()
252 *ptr++ = hexchars[R15 & 0xf]; in handle_exception()
418 registers[SPI] = registers[R15]; in handle_exception()
420 registers[SPU] = registers[R15]; in handle_exception()
425 registers[R15] = registers[SPU]; in handle_exception()
430 registers[R15] = registers[SPI]; in handle_exception()
435 registers[R15] = registers[SPI]; in handle_exception()
437 registers[R15] = registers[SPU]; in handle_exception()
481 *ptr++ = hexchars[R15 & 0xf]; in handle_exception()
[all …]
H A Damd64-linux-nat.c66 R14 * 8, R15 * 8, /* ... %r15 */
/openbsd/gnu/llvm/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.td37 def RCA : LanaiReg<15, "rca", [R15]>, DwarfRegAlias<R15>;
49 R15, RCA, // register for constant addresses
/openbsd/gnu/usr.bin/binutils/opcodes/
H A Dfr30-opc.c578 { { MNEM, ' ', '@', '(', OP (R15), ',', OP (UDISP6), ')', ',', OP (RI), 0 } },
584 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RI), 0 } },
590 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RS2), 0 } },
596 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (PS), 0 } },
656 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R15), ',', OP (UDISP6), ')', 0 } },
662 { { MNEM, ' ', OP (RI), ',', '@', '-', OP (R15), 0 } },
668 { { MNEM, ' ', OP (RS2), ',', '@', '-', OP (R15), 0 } },
674 { { MNEM, ' ', OP (PS), ',', '@', '-', OP (R15), 0 } },
1004 { { MNEM, ' ', '@', OP (R15), '+', ',', '@', OP (DIR10), 0 } },
1046 { { MNEM, ' ', '@', OP (DIR10), ',', '@', '-', OP (R15), 0 } },
/openbsd/gnu/usr.bin/binutils-2.17/opcodes/
H A Dfr30-opc.c578 { { MNEM, ' ', '@', '(', OP (R15), ',', OP (UDISP6), ')', ',', OP (RI), 0 } },
584 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RI), 0 } },
590 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RS2), 0 } },
596 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (PS), 0 } },
656 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R15), ',', OP (UDISP6), ')', 0 } },
662 { { MNEM, ' ', OP (RI), ',', '@', '-', OP (R15), 0 } },
668 { { MNEM, ' ', OP (RS2), ',', '@', '-', OP (R15), 0 } },
674 { { MNEM, ' ', OP (PS), ',', '@', '-', OP (R15), 0 } },
1004 { { MNEM, ' ', '@', OP (R15), '+', ',', '@', OP (DIR10), 0 } },
1046 { { MNEM, ' ', '@', OP (DIR10), ',', '@', '-', OP (R15), 0 } },
/openbsd/gnu/llvm/llvm/lib/Target/MSP430/
H A DMSP430CallingConv.td18 // i16 are returned in registers R12, R13, R14, R15
19 CCIfType<[i16], CCAssignToReg<[R12, R13, R14, R15]>>
H A DMSP430RegisterInfo.td70 def R15 : MSP430RegWithSubregs<15, "r15", [R15B]>;
83 (add R12, R13, R14, R15, R11, R10, R9, R8, R7, R6, R5,
H A DMSP430RegisterInfo.cpp54 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, in getCalleeSavedRegs()
60 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15, in getCalleeSavedRegs()
/openbsd/gnu/llvm/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.td51 def R15 : AVRReg<15, "r15">, DwarfRegNum<[15]>;
88 def R15R14 : AVRReg<14, "r15:r14", [R14, R15]>, DwarfRegNum<[14]>;
103 def R16R15 : AVRReg<15, "r16:r15", [R15, R16]>, DwarfRegNum<[15]>;
121 R28, R29, R17, R16, R15, R14, R13, R12, R11, R10,
126 (add R15, R14, R13, R12, R11, R10, R9, R8, R7, R6,
157 // Lower 16-bit pair registers in R0..R15, only used in inline assembly.
/openbsd/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.td67 def R15 : CSKYReg<15, "r15", ["lr"]>, DwarfRegNum<[15]>;
154 (sequence "R%u", 18, 25), R15, (sequence "R%u", 4, 11),
160 // Register class for R0 - R15.
161 // Some 16-bit integer instructions can only access R0 - R15.
163 (add (sequence "R%u", 0, 3), (sequence "R%u", 12, 13), R15,
H A DCSKYCallingConv.td13 def CSR_I32 : CalleeSavedRegs<(add R8, R15, (sequence "R%u", 4, 7),
21 def CSR_GPR_ISR : CalleeSavedRegs<(add R8, R15,
H A DCSKYRegisterInfo.cpp27 : CSKYGenRegisterInfo(CSKY::R15, 0, 0, 0) {} in CSKYRegisterInfo()
64 markSuperRegs(Reserved, CSKY::R15); // lr in getReservedRegs()
/openbsd/gnu/llvm/lldb/source/Plugins/Process/Windows/Common/x64/
H A DRegisterContextWindows_x64.cpp367 GPR_CASE(64, lldb_r15_x86_64, m_context.R15); in ReadRegister()
387 GPR_CASE(32, lldb_r15d_x86_64, static_cast<uint32_t>(m_context.R15)); in ReadRegister()
403 GPR_CASE(16, lldb_r15w_x86_64, static_cast<uint16_t>(m_context.R15)); in ReadRegister()
423 GPR_CASE(8, lldb_r15l_x86_64, static_cast<uint8_t>(m_context.R15)); in ReadRegister()
543 m_context.R15 = reg_value.GetAsUInt64(); in WriteRegister()
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonPseudo.td194 // 2) R14, R15 and R28 are reserved for PLT handling and therefore are
204 let hasSideEffects = 1, isCall = 1, Defs = [R0, R14, R15, R28, R29, R30, R31, PC] in
381 let Defs = [R14, R15, R28, R29, R30, R31, PC] in {
396 let Defs = [R14, R15, R28, R29, R30, R31, PC] in {
417 let Defs = [R14, R15, R28] in
420 let Defs = [R14, R15, R28], isExtended = 1, opExtendable = 0 in
423 let Defs = [R14, R15, R28, P0] in
426 let Defs = [R14, R15, R28, P0], isExtended = 1, opExtendable = 0 in
/openbsd/gnu/llvm/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiBaseInfo.h78 case Lanai::R15: in getLanaiRegisterNumbering()
/openbsd/gnu/llvm/compiler-rt/lib/builtins/hexagon/
H A Dfastmath2_ldlib_asm.S254 #define mantxh R15
255 #define mantx R15:14
H A Dfastmath2_dlib_asm.S274 #define min R15:14
275 #define minh R15
/openbsd/gnu/usr.bin/binutils/gdb/gdbserver/
H A Dlinux-x86-64-low.c63 R12 * 8, R13 * 8, R14 * 8, R15 * 8,
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86CallingConv.td71 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R10, R11, R12, R14, R15];
78 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R12, R13, R14, R15];
388 CCIfType<[i64], CCAssignToReg<[R15, RBP, RAX, RDX]>>
440 RAX, R10, R11, R13, R14, R15]>>
609 CCIfType<[i64], CCAssignToReg<[RBX, R12, RBP, R15,
731 CCIfType<[i64], CCAssignToReg<[R15, RBP, RSI, RDX, RCX, R8]>>,
1129 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>;
1168 R11, R12, R13, R14, R15, RBP,
1194 R13, R14, R15,
1198 R12, R13, R14, R15,
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp271 {codeview::RegisterId::R15, X86::R15}, in initLLVMToSEHAndCVRegMapping()
803 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: in getX86SubSuperRegisterOrZero()
840 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: in getX86SubSuperRegisterOrZero()
876 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: in getX86SubSuperRegisterOrZero()
912 case X86::R15B: case X86::R15W: case X86::R15D: case X86::R15: in getX86SubSuperRegisterOrZero()
913 return X86::R15; in getX86SubSuperRegisterOrZero()
/openbsd/gnu/llvm/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCTargetDesc.cpp68 InitCSKYMCRegisterInfo(Info, CSKY::R15); in createCSKYMCRegisterInfo()
/openbsd/gnu/llvm/llvm/lib/Target/ARC/
H A DARCRegisterInfo.td78 (add R0, R1, R2, R3, R12, R13, R14, R15)>;
H A DARCFrameLowering.cpp165 .addExternalSymbol(store_funclet_name[Last - ARC::R15]) in emitPrologue()
295 .addExternalSymbol(load_funclet_name[Last - ARC::R15]) in emitEpilogue()
/openbsd/gnu/llvm/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h185 ENTRY(R15)
203 ENTRY(R15)
/openbsd/gnu/llvm/compiler-rt/lib/asan/
H A Dasan_rtl_x86_64.S142 ASAN_MEMORY_ACCESS_CALLBACKS_ADD(R15)

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