1 /* $OpenBSD: r92creg.h,v 1.31 2024/09/01 03:14:48 jsg Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2015 Stefan Sperling <stsp@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #define R92C_MAX_CHAINS 2 21 #define R92C_MAX_TX_PWR 0x3f 22 #define R92C_H2C_NBOX 4 23 24 /* 25 * MAC registers. 26 */ 27 /* System Configuration. */ 28 #define R92C_SYS_ISO_CTRL 0x000 29 #define R92C_SYS_FUNC_EN 0x002 30 #define R92C_APS_FSMCO 0x004 31 #define R92C_SYS_CLKR 0x008 32 #define R92C_AFE_MISC 0x010 33 #define R92C_SPS0_CTRL 0x011 34 #define R92C_SYS_SWR_CTRL2 0x014 35 #define R92C_SPS_OCP_CFG 0x018 36 #define R92C_RSV_CTRL 0x01c 37 #define R92C_RF_CTRL 0x01f 38 #define R92C_LDOA15_CTRL 0x020 39 #define R92C_LDOV12D_CTRL 0x021 40 #define R92C_LDOHCI12_CTRL 0x022 41 #define R92C_LPLDO_CTRL 0x023 42 #define R92C_AFE_XTAL_CTRL 0x024 43 #define R92C_AFE_LDO_CTRL 0x027 44 #define R92C_AFE_PLL_CTRL 0x028 45 #define R92C_AFE_CTRL3 0x02c 46 #define R92C_EFUSE_CTRL 0x030 47 #define R92C_EFUSE_TEST 0x034 48 #define R92C_PWR_DATA 0x038 49 #define R92C_CAL_TIMER 0x03c 50 #define R92C_ACLK_MON 0x03e 51 #define R92C_GPIO_MUXCFG 0x040 52 #define R92C_GPIO_IO_SEL 0x042 53 #define R92C_MAC_PINMUX_CFG 0x043 54 #define R92C_GPIO_PIN_CTRL 0x044 55 #define R92C_GPIO_INTM 0x048 56 #define R92C_LEDCFG0 0x04c 57 #define R92C_LEDCFG1 0x04d 58 #define R92C_LEDCFG2 0x04e 59 #define R92C_LEDCFG3 0x04f 60 #define R92C_FSIMR 0x050 61 #define R92C_FSISR 0x054 62 #define R92C_HSIMR 0x058 63 #define R92C_HSISR 0x05c 64 #define R92C_AFE_XTAL_CTRL_EXT 0x078 65 #define R88E_XCK_OUT_CTRL 0x07c 66 #define R92E_LDO_SWR_CTRL 0x07c 67 #define R92C_MCUFWDL 0x080 68 #define R92C_HMEBOX_EXT(idx) (0x088 + (idx) * 2) 69 #define R88E_HIMR 0x0b0 70 #define R88E_HISR 0x0b4 71 #define R88E_HIMRE 0x0b8 72 #define R88E_HISRE 0x0bc 73 #define R92C_EFUSE_ACCESS 0x0cf 74 #define R92C_BIST_SCAN 0x0d0 75 #define R92C_BIST_RPT 0x0d4 76 #define R92C_BIST_ROM_RPT 0x0d8 77 #define R92C_USB_SIE_INTF 0x0e0 78 #define R92C_PCIE_MIO_INTF 0x0e4 79 #define R92C_PCIE_MIO_INTD 0x0e8 80 #define R92C_HPON_FSM 0x0ec 81 #define R92C_SYS_CFG 0x0f0 82 /* MAC General Configuration. */ 83 #define R92C_CR 0x100 84 #define R92C_MSR 0x102 85 #define R92C_PBP 0x104 86 #define R92C_TRXDMA_CTRL 0x10c 87 #define R92C_TRXFF_BNDY 0x114 88 #define R92C_TRXFF_STATUS 0x118 89 #define R92C_RXFF_PTR 0x11c 90 #define R92C_HIMR 0x120 91 #define R92C_HISR 0x124 92 #define R92C_HIMRE 0x128 93 #define R92C_HISRE 0x12c 94 #define R92C_CPWM 0x12f 95 #define R92C_FWIMR 0x130 96 #define R92C_FWISR 0x134 97 #define R92C_PKTBUF_DBG_CTRL 0x140 98 #define R92C_PKTBUF_DBG_DATA_L 0x144 99 #define R92C_PKTBUF_DBG_DATA_H 0x148 100 #define R92C_TC0_CTRL(i) (0x150 + (i) * 4) 101 #define R92C_TCUNIT_BASE 0x164 102 #define R92C_MBIST_START 0x174 103 #define R92C_MBIST_DONE 0x178 104 #define R92C_MBIST_FAIL 0x17c 105 #define R88E_32K_CTRL 0x194 106 #define R92C_C2HEVT_MSG 0x1a0 107 #define R92C_C2HEVT_CLEAR 0x1af 108 #define R92C_C2HEVT_MSG_TEST 0x1b8 109 #define R92C_MCUTST_1 0x1c0 110 #define R92C_FMETHR 0x1c8 111 #define R92C_HMETFR 0x1cc 112 #define R92C_HMEBOX(idx) (0x1d0 + (idx) * 4) 113 #define R92C_LLT_INIT 0x1e0 114 #define R92C_BB_ACCESS_CTRL 0x1e8 115 #define R92C_BB_ACCESS_DATA 0x1ec 116 #define R88E_HMEBOX_EXT(idx) (0x1f0 + (idx) * 4) 117 /* Tx DMA Configuration. */ 118 #define R92C_RQPN 0x200 119 #define R92C_FIFOPAGE 0x204 120 #define R92C_TDECTRL 0x208 121 #define R92C_TXDMA_OFFSET_CHK 0x20c 122 #define R92C_TXDMA_STATUS 0x210 123 #define R92C_RQPN_NPQ 0x214 124 #define R92E_AUTO_LLT 0x224 125 #define R92E_DWBCN1_CTRL 0x228 126 /* Rx DMA Configuration. */ 127 #define R92C_RXDMA_AGG_PG_TH 0x280 128 #define R92C_RXPKT_NUM 0x284 129 #define R88E_RXDMA_CTRL 0x286 130 #define R92C_RXDMA_STATUS 0x288 131 #define R92E_RXDMA_PRO 0x290 132 133 #define R92C_PCIE_CTRL_REG 0x300 134 #define R92C_INT_MIG 0x304 135 #define R92C_BCNQ_DESA 0x308 136 #define R92C_HQ_DESA 0x310 137 #define R92C_MGQ_DESA 0x318 138 #define R92C_VOQ_DESA 0x320 139 #define R92C_VIQ_DESA 0x328 140 #define R92C_BEQ_DESA 0x330 141 #define R92C_BKQ_DESA 0x338 142 #define R92C_RX_DESA 0x340 143 #define R92C_DBI 0x348 144 #define R92C_MDIO 0x354 145 #define R92C_DBG_SEL 0x360 146 #define R92C_PCIE_HRPWM 0x361 147 #define R92C_PCIE_HCPWM 0x363 148 #define R92C_UART_CTRL 0x364 149 #define R92C_UART_TX_DES 0x370 150 #define R92C_UART_RX_DES 0x378 151 152 #define R92C_VOQ_INFORMATION 0x0400 153 #define R92C_VIQ_INFORMATION 0x0404 154 #define R92C_BEQ_INFORMATION 0x0408 155 #define R92C_BKQ_INFORMATION 0x040c 156 #define R92C_MGQ_INFORMATION 0x0410 157 #define R92C_HGQ_INFORMATION 0x0414 158 #define R92C_BCNQ_INFORMATION 0x0418 159 #define R92C_CPU_MGQ_INFORMATION 0x041c 160 161 /* Protocol Configuration. */ 162 #define R92C_FWHW_TXQ_CTRL 0x420 163 #define R92C_HWSEQ_CTRL 0x423 164 #define R92C_TXPKTBUF_BCNQ_BDNY 0x424 165 #define R92C_TXPKTBUF_MGQ_BDNY 0x425 166 #define R92C_SPEC_SIFS 0x428 167 #define R92C_RL 0x42a 168 #define R92C_DARFRC 0x430 169 #define R92C_RARFRC 0x438 170 #define R92C_RRSR 0x440 171 #define R92C_ARFR(i) (0x444 + (i) * 4) 172 #define R88F_AMPDU_MAX_TIME 0x456 173 #define R92C_AGGLEN_LMT 0x458 174 #define R92C_AMPDU_MIN_SPACE 0x45c 175 #define R92C_TXPKTBUF_WMAC_LBK_BF_HD 0x45d 176 #define R92C_FAST_EDCA_CTRL 0x460 177 #define R92C_RD_RESP_PKT_TH 0x463 178 #define R92C_INIRTS_RATE_SEL 0x480 179 #define R92E_DATA_SC 0x483 180 #define R92C_INIDATA_RATE_SEL(macid) (0x484 + (macid)) 181 #define R92C_QUEUE_CTRL 0x4c6 182 #define R88F_HT_SINGLE_AMPDU 0x4c7 183 #define R92C_MAX_AGGR_NUM 0x4ca 184 #define R92C_BAR_MODE_CTRL 0x4cc 185 #define R88E_TX_RPT_CTRL 0x4ec 186 #define R88E_TX_RPT_TIME 0x4f0 187 /* EDCA Configuration. */ 188 #define R92C_EDCA_VO_PARAM 0x500 189 #define R92C_EDCA_VI_PARAM 0x504 190 #define R92C_EDCA_BE_PARAM 0x508 191 #define R92C_EDCA_BK_PARAM 0x50c 192 #define R92C_BCNTCFG 0x510 193 #define R92C_PIFS 0x512 194 #define R92C_RDG_PIFS 0x513 195 #define R92C_SIFS_CCK 0x514 196 #define R92C_SIFS_OFDM 0x516 197 #define R92C_AGGR_BREAK_TIME 0x51a 198 #define R92C_SLOT 0x51b 199 #define R92C_TX_PTCL_CTRL 0x520 200 #define R92C_TXPAUSE 0x522 201 #define R92C_DIS_TXREQ_CLR 0x523 202 #define R92C_RD_CTRL 0x524 203 #define R92C_TBTT_PROHIBIT 0x540 204 #define R92C_RD_NAV_NXT 0x544 205 #define R92C_NAV_PROT_LEN 0x546 206 #define R92C_BCN_CTRL 0x550 207 #define R92C_BCN_CTRL1 0x551 208 #define R92C_MBID_NUM 0x552 209 #define R92C_DUAL_TSF_RST 0x553 210 #define R92C_BCN_INTERVAL 0x554 211 #define R92C_DRVERLYINT 0x558 212 #define R92C_BCNDMATIM 0x559 213 #define R92C_ATIMWND 0x55a 214 #define R92C_USTIME_TSF 0x55c 215 #define R92C_BCN_MAX_ERR 0x55d 216 #define R92C_RXTSF_OFFSET_CCK 0x55e 217 #define R92C_RXTSF_OFFSET_OFDM 0x55f 218 #define R92C_TSFTR 0x560 219 #define R92C_INIT_TSFTR 0x564 220 #define R92C_PSTIMER 0x580 221 #define R92C_TIMER0 0x584 222 #define R92C_TIMER1 0x588 223 #define R92C_ACMHWCTRL 0x5c0 224 #define R92C_ACMRSTCTRL 0x5c1 225 #define R92C_ACMAVG 0x5c2 226 #define R92C_VO_ADMTIME 0x5c4 227 #define R92C_VI_ADMTIME 0x5c6 228 #define R92C_BE_ADMTIME 0x5c8 229 #define R92C_EDCA_RANDOM_GEN 0x5cc 230 #define R92C_SCH_TXCMD 0x5d0 231 /* WMAC Configuration. */ 232 #define R92C_APSD_CTRL 0x600 233 #define R92C_BWOPMODE 0x603 234 #define R92C_TCR 0x604 235 #define R92C_RCR 0x608 236 #define R88F_RX_PKT_LIMIT 0x60c 237 #define R92C_RX_DRVINFO_SZ 0x60f 238 #define R92C_MACID 0x610 239 #define R92C_BSSID 0x618 240 #define R92C_MAR 0x620 241 #define R88F_USTIME_EDCA 0x638 242 #define R92C_MAC_SPEC_SIFS 0x63a 243 #define R92C_RESP_SIFS_CCK 0x63c 244 #define R92C_RESP_SIFS_OFDM 0x63e 245 #define R92C_ACKTO 0x640 246 #define R92C_NAV_UPPER 0x652 247 #define R92C_WMAC_TRXPTCL_CTL 0x668 248 #define R92C_CAMCMD 0x670 249 #define R92C_CAMWRITE 0x674 250 #define R92C_CAMREAD 0x678 251 #define R92C_CAMDBG 0x67c 252 #define R92C_SECCFG 0x680 253 #define R92C_RXFLTMAP0 0x6a0 254 #define R92C_RXFLTMAP1 0x6a2 255 #define R92C_RXFLTMAP2 0x6a4 256 257 #define R92C_CONFIG_ANT_A 0xb68 258 #define R92C_CONFIG_ANT_B 0xb6c 259 260 /* Bits for R92C_SYS_ISO_CTRL. */ 261 #define R92C_SYS_ISO_CTRL_MD2PP 0x0001 262 #define R92C_SYS_ISO_CTRL_UA2USB 0x0002 263 #define R92C_SYS_ISO_CTRL_UD2CORE 0x0004 264 #define R92C_SYS_ISO_CTRL_PA2PCIE 0x0008 265 #define R92C_SYS_ISO_CTRL_PD2CORE 0x0010 266 #define R92C_SYS_ISO_CTRL_IP2MAC 0x0020 267 #define R92C_SYS_ISO_CTRL_DIOP 0x0040 268 #define R92C_SYS_ISO_CTRL_DIOE 0x0080 269 #define R92C_SYS_ISO_CTRL_EB2CORE 0x0100 270 #define R92C_SYS_ISO_CTRL_DIOR 0x0200 271 #define R92C_SYS_ISO_CTRL_PWC_EV25V 0x4000 272 #define R92C_SYS_ISO_CTRL_PWC_EV12V 0x8000 273 274 /* Bits for R92C_SYS_FUNC_EN. */ 275 #define R92C_SYS_FUNC_EN_BBRSTB 0x0001 276 #define R92C_SYS_FUNC_EN_BB_GLB_RST 0x0002 277 #define R92C_SYS_FUNC_EN_USBA 0x0004 278 #define R92C_SYS_FUNC_EN_UPLL 0x0008 279 #define R92C_SYS_FUNC_EN_USBD 0x0010 280 #define R92C_SYS_FUNC_EN_DIO_PCIE 0x0020 281 #define R92C_SYS_FUNC_EN_PCIEA 0x0040 282 #define R92C_SYS_FUNC_EN_PPLL 0x0080 283 #define R92C_SYS_FUNC_EN_PCIED 0x0100 284 #define R92C_SYS_FUNC_EN_DIOE 0x0200 285 #define R92C_SYS_FUNC_EN_CPUEN 0x0400 286 #define R92C_SYS_FUNC_EN_DCORE 0x0800 287 #define R92C_SYS_FUNC_EN_ELDR 0x1000 288 #define R92C_SYS_FUNC_EN_DIO_RF 0x2000 289 #define R92C_SYS_FUNC_EN_HWPDN 0x4000 290 #define R92C_SYS_FUNC_EN_MREGEN 0x8000 291 292 /* Bits for R92C_APS_FSMCO. */ 293 #define R92C_APS_FSMCO_PFM_LDALL 0x00000001 294 #define R92C_APS_FSMCO_PFM_ALDN 0x00000002 295 #define R92C_APS_FSMCO_PFM_LDKP 0x00000004 296 #define R92C_APS_FSMCO_PFM_WOWL 0x00000008 297 #define R92C_APS_FSMCO_PDN_EN 0x00000010 298 #define R92C_APS_FSMCO_PDN_PL 0x00000020 299 #define R92C_APS_FSMCO_APFM_ONMAC 0x00000100 300 #define R92C_APS_FSMCO_APFM_OFF 0x00000200 301 #define R92C_APS_FSMCO_APFM_RSM 0x00000400 302 #define R92C_APS_FSMCO_AFSM_HSUS 0x00000800 303 #define R92C_APS_FSMCO_AFSM_PCIE 0x00001000 304 #define R92C_APS_FSMCO_APDM_MAC 0x00002000 305 #define R92C_APS_FSMCO_APDM_HOST 0x00004000 306 #define R92C_APS_FSMCO_APDM_HPDN 0x00008000 307 #define R92C_APS_FSMCO_RDY_MACON 0x00010000 308 #define R92C_APS_FSMCO_SUS_HOST 0x00020000 309 #define R92C_APS_FSMCO_ROP_ALD 0x00100000 310 #define R92C_APS_FSMCO_ROP_PWR 0x00200000 311 #define R92C_APS_FSMCO_ROP_SPS 0x00400000 312 #define R92C_APS_FSMCO_SOP_MRST 0x02000000 313 #define R92C_APS_FSMCO_SOP_FUSE 0x04000000 314 #define R92C_APS_FSMCO_SOP_ABG 0x08000000 315 #define R92C_APS_FSMCO_SOP_AMB 0x10000000 316 #define R92C_APS_FSMCO_SOP_RCK 0x20000000 317 #define R92C_APS_FSMCO_SOP_A8M 0x40000000 318 #define R92C_APS_FSMCO_XOP_BTCK 0x80000000 319 320 /* Bits for R92C_SYS_CLKR. */ 321 #define R92C_SYS_CLKR_ANAD16V_EN 0x00000001 322 #define R92C_SYS_CLKR_ANA8M 0x00000002 323 #define R92C_SYS_CLKR_MACSLP 0x00000010 324 #define R92C_SYS_CLKR_LOADER_EN 0x00000020 325 #define R92C_SYS_CLKR_80M_SSC_DIS 0x00000080 326 #define R92C_SYS_CLKR_80M_SSC_EN_HO 0x00000100 327 #define R92C_SYS_CLKR_PHY_SSC_RSTB 0x00000200 328 #define R92C_SYS_CLKR_SEC_EN 0x00000400 329 #define R92C_SYS_CLKR_MAC_EN 0x00000800 330 #define R92C_SYS_CLKR_SYS_EN 0x00001000 331 #define R92C_SYS_CLKR_RING_EN 0x00002000 332 333 /* Bits for R92C_RSV_CTRL. */ 334 #define R92C_RSV_CTRL_WLOCK_ALL 0x0001 335 #define R92C_RSV_CTRL_WLOCK_00 0x0002 336 #define R92C_RSV_CTRL_WLOCK_04 0x0004 337 #define R92C_RSV_CTRL_WLOCK_08 0x0008 338 #define R92C_RSV_CTRL_WLOCK_40 0x0010 339 #define R92C_RSV_CTRL_R_DIS_PRST_0 0x0020 340 #define R92C_RSV_CTRL_R_DIS_PRST_1 0x0040 341 #define R92C_RSV_CTRL_LOCK_ALL_EN 0x0080 342 #define R88E_RSV_CTRL_MIO_EN 0x0100 343 #define R88E_RSV_CTRL_MCU_RST 0x0800 344 345 /* Bits for R92C_RF_CTRL. */ 346 #define R92C_RF_CTRL_EN 0x01 347 #define R92C_RF_CTRL_RSTB 0x02 348 #define R92C_RF_CTRL_SDMRSTB 0x04 349 350 /* Bits for R92C_LDOV12D_CTRL. */ 351 #define R92C_LDOV12D_CTRL_LDV12_EN 0x01 352 353 /* Bits for R92C_AFE_XTAL_CTRL. */ 354 #define R92C_AFE_XTAL_CTRL_ADDR_M 0x007ff800 355 #define R92C_AFE_XTAL_CTRL_ADDR_S 11 356 357 /* Bits for R88E_XCK_OUT_CTRL. */ 358 #define R88E_XCK_OUT_CTRL_EN 1 359 360 /* Bits for R92C_AFE_CTRL3. */ 361 #define R92C_AFE_CTRL3_ADDR_M 0x00fff000 362 #define R92C_AFE_CTRL3_ADDR_S 12 363 364 /* Bits for R92C_EFUSE_CTRL. */ 365 #define R92C_EFUSE_CTRL_DATA_M 0x000000ff 366 #define R92C_EFUSE_CTRL_DATA_S 0 367 #define R92C_EFUSE_CTRL_ADDR_M 0x0003ff00 368 #define R92C_EFUSE_CTRL_ADDR_S 8 369 #define R92C_EFUSE_CTRL_VALID 0x80000000 370 371 /* Bits for R92C_EFUSE_TEST. */ 372 #define R92C_EFUSE_TEST_SEL_M 0x00000300 373 #define R92C_EFUSE_TEST_SEL_S 8 374 375 /* Bits for R92C_GPIO_MUXCFG. */ 376 #define R92C_GPIO_MUXCFG_RFKILL 0x0008 377 #define R92C_GPIO_MUXCFG_ENBT 0x0020 378 #define R92C_GPIO_MUXCFG_ENSIC 0x1000 379 380 /* Bits for R92C_GPIO_IO_SEL. */ 381 #define R92C_GPIO_IO_SEL_RFKILL 0x0008 382 383 /* Bits for R92C_LEDCFG0. */ 384 #define R92C_LEDCFG0_DIS 0x08 385 386 /* Bits for R92C_LEDCFG1. */ 387 #define R92E_LEDSON 0x60 388 389 /* Bits for R92C_LEDCFG2. */ 390 #define R92C_LEDCFG2_EN 0x60 391 #define R92C_LEDCFG2_DIS 0x68 392 393 /* Bits for R92C_MCUFWDL. */ 394 #define R92C_MCUFWDL_EN 0x00000001 395 #define R92C_MCUFWDL_RDY 0x00000002 396 #define R92C_MCUFWDL_CHKSUM_RPT 0x00000004 397 #define R92C_MCUFWDL_MACINI_RDY 0x00000008 398 #define R92C_MCUFWDL_BBINI_RDY 0x00000010 399 #define R92C_MCUFWDL_RFINI_RDY 0x00000020 400 #define R92C_MCUFWDL_WINTINI_RDY 0x00000040 401 #define R92C_MCUFWDL_RAM_DL_SEL 0x00000080 /* 1: RAM, 0: ROM */ 402 #define R92C_MCUFWDL_PAGE_M 0x00070000 403 #define R92C_MCUFWDL_PAGE_S 16 404 #define R92C_MCUFWDL_ROM_DLEN 0x00080000 405 #define R92C_MCUFWDL_CPRST 0x00800000 406 407 /* Bits for R88E_HIMR. */ 408 #define R88E_HIMR_ROK 0x00000001 409 #define R88E_HIMR_RDU 0x00000002 410 #define R88E_HIMR_VODOK 0x00000004 411 #define R88E_HIMR_VIDOK 0x00000008 412 #define R88E_HIMR_BEDOK 0x00000010 413 #define R88E_HIMR_BKDOK 0x00000020 414 #define R88E_HIMR_MGNTDOK 0x00000040 415 #define R88E_HIMR_HIGHDOK 0x00000080 416 #define R88E_HIMR_CPWM 0x00000100 417 #define R88E_HIMR_CPWM2 0x00000200 418 #define R88E_HIMR_C2HCMD 0x00000400 419 #define R88E_HIMR_HISR1_IND_INT 0x00000800 420 #define R88E_HIMR_ATIMEND 0x00001000 421 #define R88E_HIMR_BCNDMAINT_E 0x00004000 422 #define R88E_HIMR_HSISR_IND_ON_INT 0x00008000 423 #define R88E_HIMR_BCNDOK0 0x00010000 424 #define R88E_HIMR_BCNDMAINT0 0x00100000 425 #define R88E_HIMR_TSF_BIT32_TOGGLE 0x01000000 426 #define R88E_HIMR_TBDOK 0x02000000 427 #define R88E_HIMR_TBDER 0x04000000 428 #define R88E_HIMR_GTINT3 0x08000000 429 #define R88E_HIMR_GTINT4 0x10000000 430 #define R88E_HIMR_PSTIMEOUT 0x20000000 431 #define R88E_HIMR_TXCCK 0x40000000 432 433 /* Bits for R88E_HIMRE.*/ 434 #define R88E_HIMRE_RXFOVW 0x00000100 435 #define R88E_HIMRE_TXFOVW 0x00000200 436 #define R88E_HIMRE_RXERR 0x00000400 437 #define R88E_HIMRE_TXERR 0x00000800 438 439 /* Bits for R88E_HSIMR */ 440 #define R88E_HSIMR_GPIO12_0_INT_EN 0x00000001 441 #define R88E_HSIMR_SPS_OCP_INT_EN 0x00000020 442 #define R88E_HSIMR_RON_INT_EN 0x00000040 443 #define R88E_HSIMR_PDN_INT_EN 0x00000080 444 #define R88E_HSIMR_GPIO9_INT_EN 0x02000000 445 446 /* Bits for R92C_EFUSE_ACCESS. */ 447 #define R92C_EFUSE_ACCESS_OFF 0x00 448 #define R92C_EFUSE_ACCESS_ON 0x69 449 450 /* Bits for R92C_HPON_FSM. */ 451 #define R92C_HPON_FSM_CHIP_BONDING_ID_S 22 452 #define R92C_HPON_FSM_CHIP_BONDING_ID_M 0x00c00000 453 #define R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R 1 454 455 /* Bits for R92C_SYS_CFG. */ 456 #define R92C_SYS_CFG_XCLK_VLD 0x00000001 457 #define R92C_SYS_CFG_ACLK_VLD 0x00000002 458 #define R92C_SYS_CFG_UCLK_VLD 0x00000004 459 #define R92C_SYS_CFG_PCLK_VLD 0x00000008 460 #define R92C_SYS_CFG_PCIRSTB 0x00000010 461 #define R92C_SYS_CFG_V15_VLD 0x00000020 462 #define R92C_SYS_CFG_TRP_B15V_EN 0x00000080 463 #define R92C_SYS_CFG_SIC_IDLE 0x00000100 464 #define R92C_SYS_CFG_BD_MAC2 0x00000200 465 #define R92C_SYS_CFG_BD_MAC1 0x00000400 466 #define R92C_SYS_CFG_IC_MACPHY_MODE 0x00000800 467 #define R92C_SYS_CFG_CHIP_VER_RTL_M 0x0000f000 468 #define R92C_SYS_CFG_CHIP_VER_RTL_S 12 469 #define R92C_SYS_CFG_BT_FUNC 0x00010000 470 #define R92C_SYS_CFG_VENDOR_UMC 0x00080000 471 #define R92C_SYS_CFG_PAD_HWPD_IDN 0x00400000 472 #define R92C_SYS_CFG_TRP_VAUX_EN 0x00800000 473 #define R92C_SYS_CFG_TRP_BT_EN 0x01000000 474 #define R92E_SYS_CFG_SPSLDO_SEL 0x01000000 475 #define R92C_SYS_CFG_BD_PKG_SEL 0x02000000 476 #define R92C_SYS_CFG_BD_HCI_SEL 0x04000000 477 #define R92C_SYS_CFG_TYPE_92C 0x08000000 478 479 /* Bits for R92C_CR. */ 480 #define R92C_CR_HCI_TXDMA_EN 0x00000001 481 #define R92C_CR_HCI_RXDMA_EN 0x00000002 482 #define R92C_CR_TXDMA_EN 0x00000004 483 #define R92C_CR_RXDMA_EN 0x00000008 484 #define R92C_CR_PROTOCOL_EN 0x00000010 485 #define R92C_CR_SCHEDULE_EN 0x00000020 486 #define R92C_CR_MACTXEN 0x00000040 487 #define R92C_CR_MACRXEN 0x00000080 488 #define R92C_CR_ENSWBCN 0x00000100 489 #define R92C_CR_ENSEC 0x00000200 490 #define R92C_CR_CALTMR_EN 0x00000400 491 492 /* Bits for R92C_MSR. */ 493 #define R92C_MSR_NETTYPE_NOLINK 0x00 494 #define R92C_MSR_NETTYPE_ADHOC 0x01 495 #define R92C_MSR_NETTYPE_INFRA 0x02 496 #define R92C_MSR_NETTYPE_AP 0x03 497 #define R92C_MSR_NETTYPE_MASK 0x03 498 499 /* Bits for R92C_PBP. */ 500 #define R92C_PBP_PSRX_M 0x0f 501 #define R92C_PBP_PSRX_S 0 502 #define R92C_PBP_PSTX_M 0xf0 503 #define R92C_PBP_PSTX_S 4 504 #define R92C_PBP_64 0 505 #define R92C_PBP_128 1 506 #define R92C_PBP_256 2 507 #define R92C_PBP_512 3 508 #define R92C_PBP_1024 4 509 510 /* Bits for R92C_TRXDMA_CTRL. */ 511 #define R92C_TRXDMA_CTRL_RXDMA_AGG_EN 0x0004 512 #define R92C_TRXDMA_CTRL_TXDMA_VOQ_MAP_M 0x0030 513 #define R92C_TRXDMA_CTRL_TXDMA_VOQ_MAP_S 4 514 #define R92C_TRXDMA_CTRL_TXDMA_VIQ_MAP_M 0x00c0 515 #define R92C_TRXDMA_CTRL_TXDMA_VIQ_MAP_S 6 516 #define R92C_TRXDMA_CTRL_TXDMA_BEQ_MAP_M 0x0300 517 #define R92C_TRXDMA_CTRL_TXDMA_BEQ_MAP_S 8 518 #define R92C_TRXDMA_CTRL_TXDMA_BKQ_MAP_M 0x0c00 519 #define R92C_TRXDMA_CTRL_TXDMA_BKQ_MAP_S 10 520 #define R92C_TRXDMA_CTRL_TXDMA_MGQ_MAP_M 0x3000 521 #define R92C_TRXDMA_CTRL_TXDMA_MGQ_MAP_S 12 522 #define R92C_TRXDMA_CTRL_TXDMA_HIQ_MAP_M 0xc000 523 #define R92C_TRXDMA_CTRL_TXDMA_HIQ_MAP_S 14 524 #define R92C_TRXDMA_CTRL_QUEUE_LOW 1 525 #define R92C_TRXDMA_CTRL_QUEUE_NORMAL 2 526 #define R92C_TRXDMA_CTRL_QUEUE_HIGH 3 527 #define R92C_TRXDMA_CTRL_QMAP_M 0xfff0 528 #define R92C_TRXDMA_CTRL_QMAP_S 4 529 /* Shortcuts. */ 530 #define R92C_TRXDMA_CTRL_QMAP_3EP 0xf5b0 531 #define R92C_TRXDMA_CTRL_QMAP_HQ_LQ 0xf5f0 532 #define R92C_TRXDMA_CTRL_QMAP_HQ_NQ 0xfaf0 533 #define R92C_TRXDMA_CTRL_QMAP_LQ 0x5550 534 #define R92C_TRXDMA_CTRL_QMAP_NQ 0xaaa0 535 #define R92C_TRXDMA_CTRL_QMAP_HQ 0xfff0 536 537 /* Bits for R92C_LLT_INIT. */ 538 #define R92C_LLT_INIT_DATA_M 0x000000ff 539 #define R92C_LLT_INIT_DATA_S 0 540 #define R92C_LLT_INIT_ADDR_M 0x0000ff00 541 #define R92C_LLT_INIT_ADDR_S 8 542 #define R92C_LLT_INIT_OP_M 0xc0000000 543 #define R92C_LLT_INIT_OP_S 30 544 #define R92C_LLT_INIT_OP_NO_ACTIVE 0 545 #define R92C_LLT_INIT_OP_WRITE 1 546 #define R92C_LLT_INIT_OP_READ 2 547 548 /* Bits for R92C_RQPN. */ 549 #define R92C_RQPN_HPQ_M 0x000000ff 550 #define R92C_RQPN_HPQ_S 0 551 #define R92C_RQPN_LPQ_M 0x0000ff00 552 #define R92C_RQPN_LPQ_S 8 553 #define R92C_RQPN_PUBQ_M 0x00ff0000 554 #define R92C_RQPN_PUBQ_S 16 555 #define R92C_RQPN_LD 0x80000000 556 557 /* Bits for R92C_TDECTRL. */ 558 #define R92C_TDECTRL_BLK_DESC_NUM_M 0x000000f0 559 #define R92C_TDECTRL_BLK_DESC_NUM_S 4 560 561 /* Bits for R92C_TXDMA_OFFSET_CHK. */ 562 #define R92C_TXDMA_OFFSET_CHK_DROP_DATA_EN 0x00000200 563 564 /* Bits for R92E_AUTO_LLT. */ 565 #define R92E_AUTO_LLT_EN 0x00010000 566 567 /* Bits for R92E_RXDMA_PRO. */ 568 #define R92E_RXDMA_PRO_DMA_MODE 0x02 569 570 /* Bits for R92C_FWHW_TXQ_CTRL. */ 571 #define R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW 0x80 572 573 /* Bits for R92C_SPEC_SIFS. */ 574 #define R92C_SPEC_SIFS_CCK_M 0x00ff 575 #define R92C_SPEC_SIFS_CCK_S 0 576 #define R92C_SPEC_SIFS_OFDM_M 0xff00 577 #define R92C_SPEC_SIFS_OFDM_S 8 578 579 /* Bits for R92C_RL. */ 580 #define R92C_RL_LRL_M 0x003f 581 #define R92C_RL_LRL_S 0 582 #define R92C_RL_SRL_M 0x3f00 583 #define R92C_RL_SRL_S 8 584 585 /* Bits for R92C_RRSR. */ 586 #define R92C_RRSR_RATE_BITMAP_M 0x000fffff 587 #define R92C_RRSR_RATE_BITMAP_S 0 588 #define R92C_RRSR_RATE_CCK_ONLY_1M 0xffff1 589 #define R92C_RRSR_RATE_ALL 0xfffff 590 #define R92C_RRSR_RSC_LOWSUBCHNL 0x00200000 591 #define R92C_RRSR_RSC_UPSUBCHNL 0x00400000 592 #define R92C_RRSR_SHORT 0x00800000 593 594 /* Bits for R88F_HT_SINGLE_AMPDU. */ 595 #define R88F_HT_SINGLE_AMPDU_EN 0x80 596 597 /* Bits for R88E_TX_RPT_CTRL. */ 598 #define R88E_TX_RPT_CTRL_EN 0x01 599 #define R88E_TX_RPT_CTRL_TIMER_EN 0x02 600 601 /* Bits for R92C_EDCA_XX_PARAM. */ 602 #define R92C_EDCA_PARAM_AIFS_M 0x000000ff 603 #define R92C_EDCA_PARAM_AIFS_S 0 604 #define R92C_EDCA_PARAM_ECWMIN_M 0x00000f00 605 #define R92C_EDCA_PARAM_ECWMIN_S 8 606 #define R92C_EDCA_PARAM_ECWMAX_M 0x0000f000 607 #define R92C_EDCA_PARAM_ECWMAX_S 12 608 #define R92C_EDCA_PARAM_TXOP_M 0xffff0000 609 #define R92C_EDCA_PARAM_TXOP_S 16 610 611 /* Bits for R92C_ACMHWCTRL */ 612 #define R92C_ACMHW_HWEN 0x01 613 #define R92C_ACMHW_BEQEN 0x02 614 #define R92C_ACMHW_VIQEN 0x04 615 #define R92C_ACMHW_VOQEN 0x08 616 #define R92C_ACMHW_BEQSTATUS 0x10 617 #define R92C_ACMHW_VIQSTATUS 0x20 618 #define R92C_ACMHW_VOQSTATUS 0x40 619 620 /* Bits for R92C_TXPAUSE. */ 621 #define R92C_TXPAUSE_AC_VO 0x01 622 #define R92C_TXPAUSE_AC_VI 0x02 623 #define R92C_TXPAUSE_AC_BE 0x04 624 #define R92C_TXPAUSE_AC_BK 0x08 625 #define R92C_TXPAUSE_MGNT 0x10 626 #define R92C_TXPAUSE_HIGH 0x20 627 #define R92C_TXPAUSE_BCN 0x40 628 #define R92C_TXPAUSE_BCN_HIGH_MGNT 0x80 629 630 #define R92C_TXPAUSE_ALL (R92C_TXPAUSE_AC_VO | R92C_TXPAUSE_AC_VI | \ 631 R92C_TXPAUSE_AC_BE | R92C_TXPAUSE_AC_BK | \ 632 R92C_TXPAUSE_MGNT | R92C_TXPAUSE_HIGH | \ 633 R92C_TXPAUSE_BCN | R92C_TXPAUSE_BCN_HIGH_MGNT) 634 635 /* Bits for R92C_BCN_CTRL. */ 636 #define R92C_BCN_CTRL_EN_MBSSID 0x02 637 #define R92C_BCN_CTRL_TXBCN_RPT 0x04 638 #define R92C_BCN_CTRL_EN_BCN 0x08 639 #define R92C_BCN_CTRL_DIS_TSF_UDT0 0x10 640 641 /* Bits for R92C_DRVERLYINT. */ 642 #define R92C_DRVERLYINT_INIT_TIME 0x05 643 644 /* Bits for R92C_BCNDMATIM. */ 645 #define R92C_BCNDMATIM_INIT_TIME 0x02 646 647 /* Bits for R92C_APSD_CTRL. */ 648 #define R92C_APSD_CTRL_OFF 0x40 649 #define R92C_APSD_CTRL_OFF_STATUS 0x80 650 651 /* Bits for R92C_BWOPMODE. */ 652 #define R92C_BWOPMODE_11J 0x01 653 #define R92C_BWOPMODE_5G 0x02 654 #define R92C_BWOPMODE_20MHZ 0x04 655 656 /* Bits for R92C_TCR. */ 657 #define R92C_TCR_TSFRST 0x00000001 658 #define R92C_TCR_DIS_GCLK 0x00000002 659 #define R92C_TCR_PAD_SEL 0x00000004 660 #define R92C_TCR_PWR_ST 0x00000040 661 #define R92C_TCR_PWRBIT_OW_EN 0x00000080 662 #define R92C_TCR_ACRC 0x00000100 663 #define R92C_TCR_CFENDFORM 0x00000200 664 #define R92C_TCR_ICV 0x00000400 665 #define R92C_TCR_ERRSTEN0 0x00001000 666 #define R92C_TCR_ERRSTEN1 0x00002000 667 #define R92C_TCR_ERRSTEN2 0x00004000 668 #define R92C_TCR_ERRSTEN3 0x00008000 669 670 /* Bits for R92C_RCR. */ 671 #define R92C_RCR_AAP 0x00000001 672 #define R92C_RCR_APM 0x00000002 673 #define R92C_RCR_AM 0x00000004 674 #define R92C_RCR_AB 0x00000008 675 #define R92C_RCR_ADD3 0x00000010 676 #define R92C_RCR_APWRMGT 0x00000020 677 #define R92C_RCR_CBSSID_DATA 0x00000040 678 #define R92C_RCR_CBSSID_BCN 0x00000080 679 #define R92C_RCR_ACRC32 0x00000100 680 #define R92C_RCR_AICV 0x00000200 681 #define R92C_RCR_ADF 0x00000800 682 #define R92C_RCR_ACF 0x00001000 683 #define R92C_RCR_AMF 0x00002000 684 #define R92C_RCR_HTC_LOC_CTRL 0x00004000 685 #define R92C_RCR_MFBEN 0x00400000 686 #define R92C_RCR_LSIGEN 0x00800000 687 #define R92C_RCR_ENMBID 0x01000000 688 #define R92C_RCR_APP_BA_SSN 0x08000000 689 #define R92C_RCR_APP_PHYSTS 0x10000000 690 #define R92C_RCR_APP_ICV 0x20000000 691 #define R92C_RCR_APP_MIC 0x40000000 692 #define R92C_RCR_APPFCS 0x80000000 693 694 /* Bits for R92C_WMAC_TRXPTCL_CTL. */ 695 #define R92C_WMAC_TRXPTCL_CTL_SHORT 0x00020000 696 #define R92C_WMAC_TRXPTCL_CTL_BW_20 0 697 #define R92C_WMAC_TRXPTCL_CTL_BW_40 0x00000080 698 #define R92C_WMAC_TRXPTCL_CTL_BW_80 0x00000100 699 #define R92C_WMAC_TRXPTCL_CTL_BW_MASK \ 700 (R92C_WMAC_TRXPTCL_CTL_BW_40 | \ 701 R92C_WMAC_TRXPTCL_CTL_BW_80) 702 703 /* Bits for R92C_CAMCMD. */ 704 #define R92C_CAMCMD_ADDR_M 0x0000ffff 705 #define R92C_CAMCMD_ADDR_S 0 706 #define R92C_CAMCMD_WRITE 0x00010000 707 #define R92C_CAMCMD_CLR 0x40000000 708 #define R92C_CAMCMD_POLLING 0x80000000 709 710 /* Bits for R92C_SECCFG. */ 711 #define R92C_SECCFG_TXUCKEY_DEF 0x0001 712 #define R92C_SECCFG_RXUCKEY_DEF 0x0002 713 #define R92C_SECCFG_TXENC_ENA 0x0004 714 #define R92C_SECCFG_RXENC_ENA 0x0008 715 #define R92C_SECCFG_CMP_A2 0x0010 716 #define R92C_SECCFG_MC_SRCH_DIS 0x0020 717 #define R92C_SECCFG_TXBCKEY_DEF 0x0040 718 #define R92C_SECCFG_RXBCKEY_DEF 0x0080 719 720 /* IMR */ 721 722 /*Beacon DMA interrupt 6 */ 723 #define R92C_IMR_BCNDMAINT6 0x80000000 724 /*Beacon DMA interrupt 5 */ 725 #define R92C_IMR_BCNDMAINT5 0x40000000 726 /*Beacon DMA interrupt 4 */ 727 #define R92C_IMR_BCNDMAINT4 0x20000000 728 /*Beacon DMA interrupt 3 */ 729 #define R92C_IMR_BCNDMAINT3 0x10000000 730 /*Beacon DMA interrupt 2 */ 731 #define R92C_IMR_BCNDMAINT2 0x08000000 732 /*Beacon DMA interrupt 1 */ 733 #define R92C_IMR_BCNDMAINT1 0x04000000 734 /*Beacon Queue DMA OK interrupt 8 */ 735 #define R92C_IMR_BCNDOK8 0x02000000 736 /*Beacon Queue DMA OK interrupt 7 */ 737 #define R92C_IMR_BCNDOK7 0x01000000 738 /*Beacon Queue DMA OK interrupt 6 */ 739 #define R92C_IMR_BCNDOK6 0x00800000 740 /*Beacon Queue DMA OK interrupt 5 */ 741 #define R92C_IMR_BCNDOK5 0x00400000 742 /*Beacon Queue DMA OK interrupt 4 */ 743 #define R92C_IMR_BCNDOK4 0x00200000 744 /*Beacon Queue DMA OK interrupt 3 */ 745 #define R92C_IMR_BCNDOK3 0x00100000 746 /*Beacon Queue DMA OK interrupt 2 */ 747 #define R92C_IMR_BCNDOK2 0x00080000 748 /*Beacon Queue DMA OK interrupt 1 */ 749 #define R92C_IMR_BCNDOK1 0x00040000 750 /*Timeout interrupt 2 */ 751 #define R92C_IMR_TIMEOUT2 0x00020000 752 /*Timeout interrupt 1 */ 753 #define R92C_IMR_TIMEOUT1 0x00010000 754 /*Transmit FIFO Overflow */ 755 #define R92C_IMR_TXFOVW 0x00008000 756 /*Power save time out interrupt */ 757 #define R92C_IMR_PSTIMEOUT 0x00004000 758 /*Beacon DMA interrupt 0 */ 759 #define R92C_IMR_BCNINT 0x00002000 760 /*Receive FIFO Overflow */ 761 #define R92C_IMR_RXFOVW 0x00001000 762 /*Receive Descriptor Unavailable */ 763 #define R92C_IMR_RDU 0x00000800 764 /*For 92C,ATIM Window End interrupt */ 765 #define R92C_IMR_ATIMEND 0x00000400 766 /*Beacon Queue DMA OK interrupt */ 767 #define R92C_IMR_BDOK 0x00000200 768 /*High Queue DMA OK interrupt */ 769 #define R92C_IMR_HIGHDOK 0x00000100 770 /*Transmit Beacon OK interrupt */ 771 #define R92C_IMR_TBDOK 0x00000080 772 /*Management Queue DMA OK interrupt */ 773 #define R92C_IMR_MGNTDOK 0x00000040 774 /*For 92C,Transmit Beacon Error interrupt */ 775 #define R92C_IMR_TBDER 0x00000020 776 /*AC_BK DMA OK interrupt */ 777 #define R92C_IMR_BKDOK 0x00000010 778 /*AC_BE DMA OK interrupt */ 779 #define R92C_IMR_BEDOK 0x00000008 780 /*AC_VI DMA OK interrupt */ 781 #define R92C_IMR_VIDOK 0x00000004 782 /*AC_VO DMA interrupt */ 783 #define R92C_IMR_VODOK 0x00000002 784 /*Receive DMA OK interrupt */ 785 #define R92C_IMR_ROK 0x00000001 786 787 #define R92C_IBSS_INT_MASK (R92C_IMR_BCNINT | R92C_IMR_TBDOK | \ 788 R92C_IMR_TBDER) 789 790 /* 791 * Baseband registers. 792 */ 793 #define R92C_FPGA0_RFMOD 0x800 794 #define R92C_FPGA0_TXINFO 0x804 795 #define R92C_FPGA0_POWER_SAVE 0x818 796 #define R92C_HSSI_PARAM1(chain) (0x820 + (chain) * 8) 797 #define R92C_HSSI_PARAM2(chain) (0x824 + (chain) * 8) 798 #define R92C_TXAGC_RATE18_06(i) (((i) == 0) ? 0xe00 : 0x830) 799 #define R92C_TXAGC_RATE54_24(i) (((i) == 0) ? 0xe04 : 0x834) 800 #define R92C_TXAGC_A_CCK1_MCS32 0xe08 801 #define R92C_TXAGC_B_CCK1_55_MCS32 0x838 802 #define R92C_TXAGC_B_CCK11_A_CCK2_11 0x86c 803 #define R92C_TXAGC_MCS03_MCS00(i) (((i) == 0) ? 0xe10 : 0x83c) 804 #define R92C_TXAGC_MCS07_MCS04(i) (((i) == 0) ? 0xe14 : 0x848) 805 #define R92C_TXAGC_MCS11_MCS08(i) (((i) == 0) ? 0xe18 : 0x84c) 806 #define R92C_TXAGC_MCS15_MCS12(i) (((i) == 0) ? 0xe1c : 0x868) 807 #define R92C_LSSI_PARAM(chain) (0x840 + (chain) * 4) 808 #define R92C_FPGA0_RFIFACEOE(chain) (0x860 + (chain) * 4) 809 #define R92C_FPGA0_RFIFACESW(idx) (0x870 + (idx) * 4) 810 #define R92C_FPGA0_RFPARAM(idx) (0x878 + (idx) * 4) 811 #define R92C_FPGA0_ANAPARAM2 0x884 812 #define R92C_LSSI_READBACK(chain) (0x8a0 + (chain) * 4) 813 #define R92C_HSPI_READBACK(chain) (0x8b8 + (chain) * 4) 814 #define R92C_FPGA1_RFMOD 0x900 815 #define R92C_FPGA1_TXINFO 0x90c 816 #define R88F_RX_DFIR 0x954 817 #define R92C_CCK0_SYSTEM 0xa00 818 #define R92C_CCK0_AFESETTING 0xa04 819 #define R92C_OFDM0_TRXPATHENA 0xc04 820 #define R92C_OFDM0_TRMUXPAR 0xc08 821 #define R92C_OFDM0_RXAFE 0xc10 822 #define R92C_OFDM0_RXIQIMBALANCE(chain) (0xc14 + (chain) * 8) 823 #define R92C_OFDM0_ECCATHRESHOLD 0xc4c 824 #define R92C_OFDM0_AGCCORE1(chain) (0xc50 + (chain) * 8) 825 #define R92C_OFDM0_AGCPARAM1 0xc70 826 #define R92C_OFDM0_AGCRSSITABLE 0xc78 827 #define R92C_OFDM0_TXIQIMBALANCE(chain) (0xc80 + (chain) * 8) 828 #define R92C_OFDM0_TXAFE(chain) (0xc94 + (chain) * 8) 829 #define R92C_OFDM0_RXIQEXTANTA 0xca0 830 #define R92C_OFDM0_TX_PSDO_NOISE_WEIGHT 0xce4 831 #define R92C_OFDM1_LSTF 0xd00 832 833 #define R92C_FPGA0_IQK 0xe28 834 #define R92C_TX_IQK_TONE_A 0xe30 835 #define R92C_RX_IQK_TONE_A 0xe34 836 #define R92C_TX_IQK_PI_A 0xe38 837 #define R92C_RX_IQK_PI_A 0xe3c 838 #define R92C_TX_IQK 0xe40 839 #define R92C_RX_IQK 0xe44 840 #define R92C_IQK_AGC_PTS 0xe48 841 #define R92C_IQK_AGC_RSP 0xe4c 842 #define R92C_TX_IQK_TONE_B 0xe50 843 #define R92C_RX_IQK_TONE_B 0xe54 844 #define R92C_TX_IQK_PI_B 0xe58 845 #define R92C_RX_IQK_PI_B 0xe5c 846 #define R92C_IQK_AGC_CONT 0xe60 847 848 #define R92E_RX_WAIT_CCA 0xe70 849 850 #define R92C_TX_POWER_BEFORE_IQK_A 0xe94 851 #define R92C_TX_POWER_AFTER_IQK_A 0xe9c 852 #define R92C_RX_POWER_BEFORE_IQK_A 0xea0 853 #define R92C_RX_POWER_BEFORE_IQK_A_2 0xea4 854 #define R92C_RX_POWER_AFTER_IQK_A 0xea8 855 #define R92C_RX_POWER_AFTER_IQK_A_2 0xeac 856 857 /* Bits for R92C_FPGA[01]_RFMOD. */ 858 #define R92C_RFMOD_40MHZ 0x00000001 859 #define R92C_RFMOD_JAPAN 0x00000002 860 #define R92C_RFMOD_CCK_TXSC 0x00000030 861 #define R92C_RFMOD_CCK_EN 0x01000000 862 #define R92C_RFMOD_OFDM_EN 0x02000000 863 864 /* Bits for R92C_HSSI_PARAM1(i). */ 865 #define R92C_HSSI_PARAM1_PI 0x00000100 866 867 /* Bits for R92C_HSSI_PARAM2(i). */ 868 #define R92C_HSSI_PARAM2_CCK_HIPWR 0x00000200 869 #define R92C_HSSI_PARAM2_ADDR_LENGTH 0x00000400 870 #define R92C_HSSI_PARAM2_DATA_LENGTH 0x00000800 871 #define R92C_HSSI_PARAM2_READ_ADDR_M 0x7f800000 872 #define R92C_HSSI_PARAM2_READ_ADDR_S 23 873 #define R92C_HSSI_PARAM2_READ_EDGE 0x80000000 874 875 /* Bits for R92C_TXAGC_A_CCK1_MCS32. */ 876 #define R92C_TXAGC_A_CCK1_M 0x0000ff00 877 #define R92C_TXAGC_A_CCK1_S 8 878 879 /* Bits for R92C_TXAGC_B_CCK11_A_CCK2_11. */ 880 #define R92C_TXAGC_B_CCK11_M 0x000000ff 881 #define R92C_TXAGC_B_CCK11_S 0 882 #define R92C_TXAGC_A_CCK2_M 0x0000ff00 883 #define R92C_TXAGC_A_CCK2_S 8 884 #define R92C_TXAGC_A_CCK55_M 0x00ff0000 885 #define R92C_TXAGC_A_CCK55_S 16 886 #define R92C_TXAGC_A_CCK11_M 0xff000000 887 #define R92C_TXAGC_A_CCK11_S 24 888 889 /* Bits for R92C_TXAGC_B_CCK1_55_MCS32. */ 890 #define R92C_TXAGC_B_CCK1_M 0x0000ff00 891 #define R92C_TXAGC_B_CCK1_S 8 892 #define R92C_TXAGC_B_CCK2_M 0x00ff0000 893 #define R92C_TXAGC_B_CCK2_S 16 894 #define R92C_TXAGC_B_CCK55_M 0xff000000 895 #define R92C_TXAGC_B_CCK55_S 24 896 897 /* Bits for R92C_TXAGC_RATE18_06(x). */ 898 #define R92C_TXAGC_RATE06_M 0x000000ff 899 #define R92C_TXAGC_RATE06_S 0 900 #define R92C_TXAGC_RATE09_M 0x0000ff00 901 #define R92C_TXAGC_RATE09_S 8 902 #define R92C_TXAGC_RATE12_M 0x00ff0000 903 #define R92C_TXAGC_RATE12_S 16 904 #define R92C_TXAGC_RATE18_M 0xff000000 905 #define R92C_TXAGC_RATE18_S 24 906 907 /* Bits for R92C_TXAGC_RATE54_24(x). */ 908 #define R92C_TXAGC_RATE24_M 0x000000ff 909 #define R92C_TXAGC_RATE24_S 0 910 #define R92C_TXAGC_RATE36_M 0x0000ff00 911 #define R92C_TXAGC_RATE36_S 8 912 #define R92C_TXAGC_RATE48_M 0x00ff0000 913 #define R92C_TXAGC_RATE48_S 16 914 #define R92C_TXAGC_RATE54_M 0xff000000 915 #define R92C_TXAGC_RATE54_S 24 916 917 /* Bits for R92C_TXAGC_MCS03_MCS00(x). */ 918 #define R92C_TXAGC_MCS00_M 0x000000ff 919 #define R92C_TXAGC_MCS00_S 0 920 #define R92C_TXAGC_MCS01_M 0x0000ff00 921 #define R92C_TXAGC_MCS01_S 8 922 #define R92C_TXAGC_MCS02_M 0x00ff0000 923 #define R92C_TXAGC_MCS02_S 16 924 #define R92C_TXAGC_MCS03_M 0xff000000 925 #define R92C_TXAGC_MCS03_S 24 926 927 /* Bits for R92C_TXAGC_MCS07_MCS04(x). */ 928 #define R92C_TXAGC_MCS04_M 0x000000ff 929 #define R92C_TXAGC_MCS04_S 0 930 #define R92C_TXAGC_MCS05_M 0x0000ff00 931 #define R92C_TXAGC_MCS05_S 8 932 #define R92C_TXAGC_MCS06_M 0x00ff0000 933 #define R92C_TXAGC_MCS06_S 16 934 #define R92C_TXAGC_MCS07_M 0xff000000 935 #define R92C_TXAGC_MCS07_S 24 936 937 /* Bits for R92C_TXAGC_MCS11_MCS08(x). */ 938 #define R92C_TXAGC_MCS08_M 0x000000ff 939 #define R92C_TXAGC_MCS08_S 0 940 #define R92C_TXAGC_MCS09_M 0x0000ff00 941 #define R92C_TXAGC_MCS09_S 8 942 #define R92C_TXAGC_MCS10_M 0x00ff0000 943 #define R92C_TXAGC_MCS10_S 16 944 #define R92C_TXAGC_MCS11_M 0xff000000 945 #define R92C_TXAGC_MCS11_S 24 946 947 /* Bits for R92C_TXAGC_MCS15_MCS12(x). */ 948 #define R92C_TXAGC_MCS12_M 0x000000ff 949 #define R92C_TXAGC_MCS12_S 0 950 #define R92C_TXAGC_MCS13_M 0x0000ff00 951 #define R92C_TXAGC_MCS13_S 8 952 #define R92C_TXAGC_MCS14_M 0x00ff0000 953 #define R92C_TXAGC_MCS14_S 16 954 #define R92C_TXAGC_MCS15_M 0xff000000 955 #define R92C_TXAGC_MCS15_S 24 956 957 /* Bits for R92C_LSSI_PARAM(i). */ 958 #define R92C_LSSI_PARAM_DATA_M 0x000fffff 959 #define R92C_LSSI_PARAM_DATA_S 0 960 #define R92C_LSSI_PARAM_ADDR_M 0x03f00000 961 #define R92C_LSSI_PARAM_ADDR_S 20 962 #define R88E_LSSI_PARAM_ADDR_M 0x0ff00000 963 #define R88E_LSSI_PARAM_ADDR_S 20 964 965 /* Bits for R92C_FPGA0_ANAPARAM2. */ 966 #define R92C_FPGA0_ANAPARAM2_CBW20 0x00000400 967 968 /* Bits for R92C_LSSI_READBACK(i). */ 969 #define R92C_LSSI_READBACK_DATA_M 0x000fffff 970 #define R92C_LSSI_READBACK_DATA_S 0 971 972 /* Bits for R92C_OFDM0_AGCCORE1(i). */ 973 #define R92C_OFDM0_AGCCORE1_GAIN_M 0x0000007f 974 #define R92C_OFDM0_AGCCORE1_GAIN_S 0 975 976 977 /* 978 * USB registers. 979 */ 980 #define R92C_USB_INFO 0xfe17 981 #define R92C_USB_SPECIAL_OPTION 0xfe55 982 #define R92C_USB_HCPWM 0xfe57 983 #define R92C_USB_HRPWM 0xfe58 984 #define R92C_USB_DMA_AGG_TO 0xfe5b 985 #define R92C_USB_AGG_TO 0xfe5c 986 #define R92C_USB_AGG_TH 0xfe5d 987 #define R92C_USB_VID 0xfe60 988 #define R92C_USB_PID 0xfe62 989 #define R92C_USB_OPTIONAL 0xfe64 990 #define R92C_USB_EP 0xfe65 991 #define R92C_USB_PHY 0xfe68 992 #define R92C_USB_MAC_ADDR 0xfe70 993 #define R92C_USB_STRING 0xfe80 994 995 /* Bits for R92C_USB_SPECIAL_OPTION. */ 996 #define R92C_USB_SPECIAL_OPTION_AGG_EN 0x08 997 #define R92C_USB_SPECIAL_OPTION_INT_BULK_SEL 0x10 998 999 /* Bits for R92C_USB_EP. */ 1000 #define R92C_USB_EP_HQ_M 0x000f 1001 #define R92C_USB_EP_HQ_S 0 1002 #define R92C_USB_EP_NQ_M 0x00f0 1003 #define R92C_USB_EP_NQ_S 4 1004 #define R92C_USB_EP_LQ_M 0x0f00 1005 #define R92C_USB_EP_LQ_S 8 1006 1007 /* 1008 * Firmware base address. 1009 */ 1010 #define R92C_FW_START_ADDR 0x1000 1011 #define R92C_FW_PAGE_SIZE 4096 1012 1013 1014 /* 1015 * RF (6052) registers. 1016 */ 1017 #define R92C_RF_AC 0x00 1018 #define R92C_RF_IQADJ_G(i) (0x01 + (i)) 1019 #define R92C_RF_POW_TRSW 0x05 1020 #define R92C_RF_GAIN_RX 0x06 1021 #define R92C_RF_GAIN_TX 0x07 1022 #define R92C_RF_TXM_IDAC 0x08 1023 #define R92C_RF_BS_IQGEN 0x0f 1024 #define R92C_RF_MODE1 0x10 1025 #define R92C_RF_MODE2 0x11 1026 #define R92C_RF_RX_AGC_HP 0x12 1027 #define R92C_RF_TX_AGC 0x13 1028 #define R92C_RF_BIAS 0x14 1029 #define R92C_RF_IPA 0x15 1030 #define R92C_RF_POW_ABILITY 0x17 1031 #define R92C_RF_CHNLBW 0x18 1032 #define R92C_RF_RX_G1 0x1a 1033 #define R92C_RF_RX_G2 0x1b 1034 #define R92C_RF_RX_BB2 0x1c 1035 #define R92C_RF_RX_BB1 0x1d 1036 #define R92C_RF_RCK1 0x1e 1037 #define R92C_RF_RCK2 0x1f 1038 #define R92C_RF_TX_G(i) (0x20 + (i)) 1039 #define R92C_RF_TX_BB1 0x23 1040 #define R92C_RF_T_METER 0x24 1041 #define R92C_RF_SYN_G(i) (0x25 + (i)) 1042 #define R92C_RF_RCK_OS 0x30 1043 #define R92C_RF_TXPA_G(i) (0x31 + (i)) 1044 #define R92E_RF_T_METER 0x42 1045 1046 /* Bits for R92C_RF_AC. */ 1047 #define R92C_RF_AC_MODE_M 0x70000 1048 #define R92C_RF_AC_MODE_S 16 1049 #define R92C_RF_AC_MODE_STANDBY 1 1050 1051 /* Bits for R92C_RF_CHNLBW. */ 1052 #define R92C_RF_CHNLBW_CHNL_M 0x003ff 1053 #define R92C_RF_CHNLBW_CHNL_S 0 1054 #define R92C_RF_CHNLBW_BW20 0x00400 1055 #define R88E_RF_CHNLBW_BW20 0x00c00 1056 #define R92C_RF_CHNLBW_LCSTART 0x08000 1057 1058 1059 /* 1060 * CAM entries. 1061 */ 1062 #define R92C_CAM_ENTRY_COUNT 32 1063 1064 #define R92C_CAM_CTL0(entry) ((entry) * 8 + 0) 1065 #define R92C_CAM_CTL1(entry) ((entry) * 8 + 1) 1066 #define R92C_CAM_KEY(entry, i) ((entry) * 8 + 2 + (i)) 1067 1068 /* Bits for R92C_CAM_CTL0(i). */ 1069 #define R92C_CAM_KEYID_M 0x00000003 1070 #define R92C_CAM_KEYID_S 0 1071 #define R92C_CAM_ALGO_M 0x0000001c 1072 #define R92C_CAM_ALGO_S 2 1073 #define R92C_CAM_ALGO_NONE 0 1074 #define R92C_CAM_ALGO_WEP40 1 1075 #define R92C_CAM_ALGO_TKIP 2 1076 #define R92C_CAM_ALGO_AES 4 1077 #define R92C_CAM_ALGO_WEP104 5 1078 #define R92C_CAM_VALID 0x00008000 1079 #define R92C_CAM_MACLO_M 0xffff0000 1080 #define R92C_CAM_MACLO_S 16 1081 1082 /* Rate adaptation modes. */ 1083 #define R92C_RAID_11GN 1 1084 #define R92C_RAID_11N 3 1085 #define R92C_RAID_11BG 4 1086 #define R92C_RAID_11G 5 /* "pure" 11g */ 1087 #define R92C_RAID_11B 6 1088 1089 #define R92E_RAID_11BG 6 1090 #define R92E_RAID_11G 7 /* "pure" 11g */ 1091 #define R92E_RAID_11B 8 1092 1093 1094 /* Macros to access unaligned little-endian memory. */ 1095 #define LE_READ_2(x) ((x)[0] | (x)[1] << 8) 1096 #define LE_READ_4(x) ((x)[0] | (x)[1] << 8 | (x)[2] << 16 | (x)[3] << 24) 1097 1098 /* 1099 * Macros to access subfields in registers. 1100 */ 1101 /* Mask and Shift (getter). */ 1102 #define MS(val, field) \ 1103 (((val) & field##_M) >> field##_S) 1104 1105 /* Shift and Mask (setter). */ 1106 #define SM(field, val) \ 1107 (((val) << field##_S) & field##_M) 1108 1109 /* Rewrite. */ 1110 #define RW(var, field, val) \ 1111 (((var) & ~field##_M) | SM(field, val)) 1112 1113 /* 1114 * Firmware image header. 1115 */ 1116 struct r92c_fw_hdr { 1117 /* QWORD0 */ 1118 uint16_t signature; 1119 uint8_t category; 1120 uint8_t function; 1121 uint16_t version; 1122 uint16_t subversion; 1123 /* QWORD1 */ 1124 uint8_t month; 1125 uint8_t date; 1126 uint8_t hour; 1127 uint8_t minute; 1128 uint16_t ramcodesize; 1129 uint16_t reserved2; 1130 /* QWORD2 */ 1131 uint32_t svnidx; 1132 uint32_t reserved3; 1133 /* QWORD3 */ 1134 uint32_t reserved4; 1135 uint32_t reserved5; 1136 } __packed; 1137 1138 /* 1139 * Host to firmware commands. 1140 */ 1141 struct r92c_fw_cmd { 1142 uint8_t id; 1143 #define R92C_CMD_AP_OFFLOAD 0 1144 #define R92C_CMD_SET_PWRMODE 1 1145 #define R92C_CMD_JOINBSS_RPT 2 1146 #define R92C_CMD_RSVD_PAGE 3 1147 #define R92C_CMD_RSSI 4 1148 #define R92C_CMD_RSSI_SETTING 5 1149 #define R92C_CMD_MACID_CONFIG 6 1150 #define R92C_CMD_MACID_PS_MODE 7 1151 #define R92C_CMD_P2P_PS_OFFLOAD 8 1152 #define R92C_CMD_SELECTIVE_SUSPEND 9 1153 #define R92C_CMD_FLAG_EXT 0x80 1154 1155 uint8_t msg[5]; 1156 } __packed; 1157 1158 /* Structure for R92C_CMD_RSSI_SETTING. */ 1159 struct r92c_fw_cmd_rssi { 1160 uint8_t macid; 1161 uint8_t reserved; 1162 uint8_t pwdb; 1163 } __packed; 1164 1165 /* Structure for R92C_CMD_MACID_CONFIG. */ 1166 struct r92c_fw_cmd_macid_cfg { 1167 uint32_t mask; 1168 uint8_t macid; 1169 #define R92C_MACID_BSS 0 1170 #define R92C_MACID_BC 4 /* Broadcast. */ 1171 #define R92C_MACID_VALID 0x80 1172 #define R92C_MACID_SHORTGI 0x20 1173 } __packed; 1174 1175 /* Structure for R92C_CMD_SET_PWRMODE. */ 1176 struct r92c_fw_cmd_setpwrmode { 1177 uint8_t mode; 1178 uint8_t smartps; 1179 uint8_t bcn_time; /* 100ms increments */ 1180 } __packed; 1181 1182 #define R92E_CMD_KEEP_ALIVE 0x03 1183 #define R92E_CMD_SET_PWRMODE 0x20 1184 #define R92E_CMD_RSSI_REPORT 0x42 1185 1186 /* Structure for R92E_CMD_KEEP_ALIVE. */ 1187 struct r92e_fw_cmd_keepalive { 1188 uint8_t mode; 1189 uint8_t period; 1190 } __packed; 1191 1192 /* Structure for R92E_CMD_SET_PWRMODE. */ 1193 struct r92e_fw_cmd_setpwrmode { 1194 uint8_t mode; 1195 #define FWMODE_ACTIVE 0 1196 #define FWMODE_LOW_POWER 1 1197 #define FWMODE_WMMPS 2 1198 uint8_t smartps; 1199 #define SRTPS_LOW_POWER 0 1200 #define SRTPS_POLL 0x10 1201 #define SRTPS_WMMPS 0x20 1202 uint8_t awake_int; /* 100ms increments. */ 1203 uint8_t all_queue_apsd; 1204 uint8_t pwr_state; 1205 #define PS_PFOFF 0x00 1206 #define PS_RFON 0x04 1207 #define PS_ALLON 0x0c 1208 } __packed; 1209 1210 /* Structure for R92E_CMD_RSSI_REPORT. */ 1211 struct r92e_fw_cmd_rssi { 1212 uint8_t macid; 1213 uint8_t reserved; 1214 uint8_t pwdb; 1215 uint8_t reserved2; 1216 } __packed; 1217 1218 /* 1219 * RTL8192CU ROM image. 1220 */ 1221 struct r92c_rom { 1222 uint16_t id; /* 0x8129 */ 1223 uint8_t reserved1[5]; 1224 uint8_t dbg_sel; 1225 uint16_t reserved2; 1226 uint16_t vid; 1227 uint16_t pid; 1228 uint8_t usb_opt; 1229 uint8_t ep_setting; 1230 uint16_t reserved3; 1231 uint8_t usb_phy; 1232 uint8_t reserved4[3]; 1233 uint8_t macaddr[IEEE80211_ADDR_LEN]; 1234 uint8_t string[61]; /* "Realtek" */ 1235 uint8_t subcustomer_id; 1236 uint8_t cck_tx_pwr[R92C_MAX_CHAINS][3]; 1237 uint8_t ht40_1s_tx_pwr[R92C_MAX_CHAINS][3]; 1238 uint8_t ht40_2s_tx_pwr_diff[3]; 1239 uint8_t ht20_tx_pwr_diff[3]; 1240 uint8_t ofdm_tx_pwr_diff[3]; 1241 uint8_t ht40_max_pwr[3]; 1242 uint8_t ht20_max_pwr[3]; 1243 uint8_t channel_plan; 1244 uint8_t tssi[R92C_MAX_CHAINS]; 1245 uint8_t thermal_meter; 1246 uint8_t rf_opt1; 1247 #define R92C_ROM_RF1_REGULATORY_M 0x07 1248 #define R92C_ROM_RF1_REGULATORY_S 0 1249 #define R92C_ROM_RF1_BOARD_TYPE_M 0xe0 1250 #define R92C_ROM_RF1_BOARD_TYPE_S 5 1251 #define R92C_BOARD_TYPE_DONGLE 0 1252 #define R92C_BOARD_TYPE_HIGHPA 1 1253 #define R92C_BOARD_TYPE_MINICARD 2 1254 #define R92C_BOARD_TYPE_SOLO 3 1255 #define R92C_BOARD_TYPE_COMBO 4 1256 1257 uint8_t rf_opt2; 1258 uint8_t rf_opt3; 1259 uint8_t rf_opt4; 1260 uint8_t reserved5; 1261 uint8_t version; 1262 uint8_t customer_id; 1263 } __packed; 1264 1265 struct r92e_tx_pwr { 1266 uint8_t cck_tx_pwr[6]; 1267 uint8_t ht40_tx_pwr[5]; 1268 uint8_t ht20_ofdm_tx_pwr_diff; 1269 #define R92E_ROM_TXPWR_HT20_DIFF_M 0xf0 1270 #define R92E_ROM_TXPWR_HT20_DIFF_S 4 1271 #define R92E_ROM_TXPWR_OFDM_DIFF_M 0x0f 1272 #define R92E_ROM_TXPWR_OFDM_DIFF_S 0 1273 1274 struct { 1275 uint8_t ht40_ht20_tx_pwr_diff; 1276 #define R92E_ROM_TXPWR_HT40_DIFF_M 0xf0 1277 #define R92E_ROM_TXPWR_HT40_DIFF_S 4 1278 #define R92E_ROM_TXPWR_HT20_2S_DIFF_M 0x0f 1279 #define R92E_ROM_TXPWR_HT20_2S_DIFF_S 0 1280 1281 uint8_t ofdm_cck_tx_pwr_diff; 1282 } __packed pwr_diff[3]; 1283 1284 uint8_t reserved[24]; 1285 } __packed; 1286 1287 struct r92e_rom { 1288 uint16_t id; 1289 uint8_t reserved[14]; 1290 struct r92e_tx_pwr txpwr_a; 1291 struct r92e_tx_pwr txpwr_b; 1292 uint8_t reserved2[84]; 1293 uint8_t channel_plan; 1294 uint8_t xtal_k; 1295 uint8_t thermal_meter; 1296 uint8_t iqk_lck; 1297 uint8_t pa_type; 1298 uint8_t lna_type_2g; 1299 uint8_t reserved3; 1300 uint8_t lna_type_5g; 1301 uint8_t reserved4; 1302 uint8_t rf_board_opt; 1303 uint8_t rf_feature_opt; 1304 uint8_t rf_bt_opt; 1305 uint8_t eeprom_version; 1306 uint8_t eeprom_customer_id; 1307 uint8_t reserved5[3]; 1308 uint8_t rf_antenna_option; 1309 uint8_t reserved6[6]; 1310 uint16_t vid; 1311 uint16_t pid; 1312 uint8_t usb_optional_function; 1313 uint8_t reserved9[2]; 1314 uint8_t macaddr[IEEE80211_ADDR_LEN]; 1315 uint8_t reserved10[2]; 1316 uint8_t vendor[7]; 1317 uint8_t reserved11[2]; 1318 uint8_t device_name[11]; 1319 uint8_t reserved12[2]; 1320 uint8_t serial[11]; 1321 uint8_t reserved13[48]; 1322 uint8_t unknown[13]; 1323 uint8_t reserved14[195]; 1324 } __packed; 1325 1326 struct r88e_tx_pwr { 1327 uint8_t cck_tx_pwr[6]; 1328 uint8_t ht40_tx_pwr[5]; 1329 uint8_t ht20_ofdm_tx_pwr_diff; 1330 #define R88E_ROM_TXPWR_HT20_DIFF_M 0xf0 1331 #define R88E_ROM_TXPWR_HT20_DIFF_S 4 1332 #define R88E_ROM_TXPWR_OFDM_DIFF_M 0x0f 1333 #define R88E_ROM_TXPWR_OFDM_DIFF_S 0 1334 1335 } __packed; 1336 1337 /* 1338 * RTL8188E ROM images. 1339 */ 1340 struct r88e_rom { 1341 uint16_t id; 1342 uint8_t reserved1[14]; 1343 struct r88e_tx_pwr txpwr; 1344 uint8_t reserved2[156]; 1345 uint8_t channel_plan; 1346 uint8_t xtal; 1347 uint8_t thermal_meter; 1348 uint8_t reserved3[6]; 1349 uint8_t rf_board_opt; 1350 uint8_t rf_feature_opt; 1351 uint8_t rf_bt_opt; 1352 uint8_t version; 1353 uint8_t customer_id; 1354 uint8_t reserved4[3]; 1355 uint8_t rf_ant_opt; 1356 uint8_t reserved5[6]; 1357 union { 1358 #define r88ee_rom u.r88ee 1359 struct { 1360 uint8_t macaddr[IEEE80211_ADDR_LEN]; 1361 uint16_t vid; 1362 uint16_t did; 1363 uint16_t svid; 1364 uint16_t smid; 1365 uint8_t reserved6[290]; 1366 } __packed r88ee; 1367 1368 #define r88eu_rom u.r88eu 1369 struct { 1370 uint16_t vid; 1371 uint16_t pid; 1372 uint8_t usb_opt; 1373 uint8_t reserved6[2]; 1374 uint8_t macaddr[IEEE80211_ADDR_LEN]; 1375 uint8_t reserved7[2]; 1376 uint8_t string[33]; /* "Realtek" */ 1377 uint8_t reserved8[256]; 1378 } __packed r88eu; 1379 } u; 1380 } __packed; 1381 1382 /* 1383 * RTL8188FTV ROM image. 1384 */ 1385 struct r88f_rom { 1386 uint16_t id; 1387 uint8_t reserved1[14]; 1388 struct r88e_tx_pwr txpwr; 1389 uint8_t reserved2[156]; 1390 uint8_t channel_plan; 1391 uint8_t xtal; 1392 uint8_t thermal_meter; 1393 uint8_t iqk_lck; 1394 uint8_t pa_type; 1395 uint8_t lna_type_2g; 1396 uint8_t reserved3[3]; 1397 uint8_t rf_board_opt; 1398 uint8_t rf_feature_opt; 1399 uint8_t rf_bt_opt; 1400 uint8_t eeprom_version; 1401 uint8_t eeprom_customer_id; 1402 uint8_t reserved4[10]; 1403 uint16_t vid; 1404 uint16_t pid; 1405 uint8_t usb_optional_function; 1406 uint8_t reserved5[2]; 1407 uint8_t macaddr[IEEE80211_ADDR_LEN]; 1408 uint8_t reserved6[291]; 1409 } __packed; 1410 1411 /* 1412 * RTL8723A ROM images. 1413 */ 1414 struct r23a_rom { 1415 uint16_t id; /* 0x8129 */ /* 0x00 */ 1416 uint8_t reserved[14]; /* 0x02 */ 1417 1418 uint8_t tx_pwr_cck_a[3]; /* 0x10 */ 1419 uint8_t tx_pwr_cck_b[3]; /* 0x13 */ 1420 uint8_t tx_pwr_ht40_1s_a[3]; /* 0x16 */ 1421 uint8_t tx_pwr_ht40_1s_b[3]; /* 0x19 */ 1422 uint8_t tx_pwr_ht20_diff[3]; /* 0x1c */ 1423 uint8_t tx_pwr_ofdm_diff[3]; /* 0x1f */ 1424 1425 uint8_t ht40_max_pwr_offset[3]; /* 0x22 */ 1426 uint8_t ht20_max_pwr_offset[3]; /* 0x25 */ 1427 uint8_t channel_plan; /* 0x28 */ 1428 uint8_t tssi_a; /* 0x29 */ 1429 uint8_t thermal_meter; /* 0x2a */ 1430 uint8_t reserved2[5]; /* 0x2b */ 1431 1432 uint8_t version; /* 0x30 */ 1433 uint8_t customer_id; /* 0x31 */ 1434 uint8_t customer_id_min; /* 0x32 */ 1435 uint8_t reserved3[22]; /* 0x33 */ 1436 1437 uint16_t vid; /* 0x49 */ 1438 uint16_t did; /* 0x4b */ 1439 uint16_t svid; /* 0x4d */ 1440 uint16_t smid; /* 0x4f */ 1441 1442 uint8_t reserved4[3]; /* 0x51 */ 1443 uint8_t pwr_diff; /* 0x54 */ 1444 uint8_t reserved5[5]; /* 0x55 */ 1445 uint8_t cck_tx_pwr; /* 0x5a */ 1446 uint8_t reserved6[5]; /* 0x5b */ 1447 1448 uint8_t ht40_1s_tx_pwr; /* 0x60 */ 1449 uint8_t reserved7[5]; 1450 uint8_t ht40_2s_tx_pwr_diff; /* 0x66 */ 1451 uint8_t macaddr[IEEE80211_ADDR_LEN]; /* 0x67 */ 1452 uint8_t reserved8[10]; /* 0x6d */ 1453 1454 uint8_t tssi_b; /* 0x77 */ 1455 uint8_t xtal_k; /* 0x78 */ 1456 uint8_t rf_opt1; /* 0x79 */ 1457 uint8_t rf_opt2; /* 0x7a */ 1458 uint8_t rf_opt3; /* 0x7b */ 1459 uint8_t rf_opt4; /* 0x7c */ 1460 uint8_t reserved9[131]; /* 0x7d */ 1461 } __packed; 1462 1463 /* Rx PHY descriptor. */ 1464 struct r92c_rx_phystat { 1465 uint32_t phydw0; 1466 uint32_t phydw1; 1467 uint32_t phydw2; 1468 uint32_t phydw3; 1469 uint32_t phydw4; 1470 uint32_t phydw5; 1471 uint32_t phydw6; 1472 uint32_t phydw7; 1473 } __packed __attribute__((aligned(4))); 1474 1475 /* Rx PHY CCK descriptor. */ 1476 struct r92c_rx_cck { 1477 uint8_t adc_pwdb[4]; 1478 uint8_t sq_rpt; 1479 uint8_t agc_rpt; 1480 } __packed; 1481 1482 /* Tx report (type 1). */ 1483 struct r88e_tx_rpt_ccx { 1484 uint8_t rptb0; 1485 #define R88E_RPTB6_PKT_NUM_M 0x0e 1486 #define R88E_RPTB6_PKT_NUM_S 1 1487 #define R88E_RPTB0_INT_CCX 0x80 1488 1489 uint8_t rptb1; 1490 #define R88E_RPTB1_MACID_M 0x3f 1491 #define R88E_RPTB1_MACID_S 0 1492 #define R88E_RPTB1_PKT_OK 0x40 1493 #define R88E_RPTB1_BMC 0x80 1494 1495 uint8_t rptb2; 1496 #define R88E_RPTB2_RETRY_CNT_M 0x3f 1497 #define R88E_RPTB2_RETRY_CNT_S 0 1498 #define R88E_RPTB2_LIFE_EXPIRE 0x40 1499 #define R88E_RPTB2_RETRY_OVER 0x80 1500 1501 uint8_t queue_time_low; 1502 uint8_t queue_time_high; 1503 uint8_t final_rate; 1504 uint8_t rptb6; 1505 #define R88E_RPTB6_QSEL_M 0xf0 1506 #define R88E_RPTB6_QSEL_S 4 1507 1508 uint8_t rptb7; 1509 } __packed; 1510 1511 struct r88e_rx_phystat { 1512 uint8_t path_agc[2]; 1513 uint8_t ch_corr[2]; 1514 uint8_t sq_rpt; 1515 uint8_t agc_rpt; 1516 uint8_t rpt_b; 1517 uint8_t reserved1; 1518 uint8_t noise_power; 1519 int8_t path_cfotail[2]; 1520 uint8_t pcts_mask[2]; 1521 int8_t stream_rxevm[2]; 1522 uint8_t path_rxsnr[2]; 1523 uint8_t noise_power_db_lsb; 1524 uint8_t reserved2[3]; 1525 uint8_t stream_csi[2]; 1526 uint8_t stream_target_csi[2]; 1527 int8_t sig_evm; 1528 uint8_t reserved3; 1529 uint8_t reserved4; 1530 } __packed; 1531 1532 /* Rx MAC descriptor. */ 1533 1534 struct r92c_rx_desc_pci { 1535 uint32_t rxdw0; 1536 uint32_t rxdw1; 1537 uint32_t rxdw2; 1538 uint32_t rxdw3; 1539 uint32_t rxdw4; 1540 uint32_t rxdw5; 1541 uint32_t rxbufaddr; 1542 uint32_t rxbufaddr64; 1543 } __packed __attribute__((aligned(4))); 1544 1545 struct r92c_rx_desc_usb { 1546 uint32_t rxdw0; 1547 uint32_t rxdw1; 1548 uint32_t rxdw2; 1549 uint32_t rxdw3; 1550 uint32_t rxdw4; 1551 uint32_t rxdw5; 1552 } __packed __attribute__((aligned(4))); 1553 1554 #define R92C_RXDW0_PKTLEN_M 0x00003fff 1555 #define R92C_RXDW0_PKTLEN_S 0 1556 #define R92C_RXDW0_CRCERR 0x00004000 1557 #define R92C_RXDW0_ICVERR 0x00008000 1558 #define R92C_RXDW0_INFOSZ_M 0x000f0000 1559 #define R92C_RXDW0_INFOSZ_S 16 1560 #define R92C_RXDW0_QOS 0x00800000 1561 #define R92C_RXDW0_SHIFT_M 0x03000000 1562 #define R92C_RXDW0_SHIFT_S 24 1563 #define R92C_RXDW0_PHYST 0x04000000 1564 #define R92C_RXDW0_DECRYPTED 0x08000000 1565 #define R92C_RXDW0_LS 0x10000000 1566 #define R92C_RXDW0_FS 0x20000000 1567 #define R92C_RXDW0_EOR 0x40000000 1568 #define R92C_RXDW0_OWN 0x80000000 1569 1570 #define R92C_RXDW2_PKTCNT_M 0x00ff0000 1571 #define R92C_RXDW2_PKTCNT_S 16 1572 #define R92E_RXDW2_RPT_C2H 0x10000000 1573 1574 #define R92C_RXDW3_RATE_M 0x0000003f 1575 #define R92C_RXDW3_RATE_S 0 1576 #define R92E_RXDW3_RATE_M 0x0000007f 1577 #define R92E_RXDW3_RATE_S 0 1578 #define R92C_RXDW3_HT 0x00000040 1579 #define R92C_RXDW3_HTC 0x00000400 1580 #define R88E_RXDW3_RPT_M 0x0000c000 1581 #define R88E_RXDW3_RPT_S 14 1582 #define R88E_RXDW3_RPT_RX 0 1583 #define R88E_RXDW3_RPT_TX1 1 1584 #define R88E_RXDW3_RPT_TX2 2 1585 #define R88E_RXDW3_RPT_HIS 3 1586 1587 /* Tx MAC descriptor. */ 1588 1589 struct r92c_tx_desc_pci { 1590 uint32_t txdw0; 1591 uint32_t txdw1; 1592 uint32_t txdw2; 1593 uint16_t txdw3; 1594 uint16_t txdseq; 1595 uint32_t txdw4; 1596 uint32_t txdw5; 1597 uint32_t txdw6; 1598 uint16_t txbufsize; 1599 uint16_t pad; 1600 uint32_t txbufaddr; 1601 uint32_t txbufaddr64; 1602 uint32_t nextdescaddr; 1603 uint32_t nextdescaddr64; 1604 uint32_t reserved[4]; 1605 } __packed __attribute__((aligned(4))); 1606 1607 struct r92c_tx_desc_usb { 1608 uint32_t txdw0; 1609 uint32_t txdw1; 1610 uint32_t txdw2; 1611 uint16_t txdw3; 1612 uint16_t txdseq; 1613 uint32_t txdw4; 1614 uint32_t txdw5; 1615 uint32_t txdw6; 1616 uint16_t txdsum; 1617 uint16_t pad; 1618 } __packed __attribute__((aligned(4))); 1619 1620 struct r92e_tx_desc_usb { 1621 uint32_t txdw0; 1622 uint32_t txdw1; 1623 uint32_t txdw2; 1624 uint32_t txdw3; 1625 uint32_t txdw4; 1626 uint32_t txdw5; 1627 uint32_t txdw6; 1628 uint16_t txdsum; 1629 uint16_t pad; 1630 uint32_t txdw7; 1631 uint16_t txdseq2; 1632 uint16_t txdw8; 1633 } __packed __attribute__((aligned(4))); 1634 1635 #define R92C_TXDW0_PKTLEN_M 0x0000ffff 1636 #define R92C_TXDW0_PKTLEN_S 0 1637 #define R92C_TXDW0_OFFSET_M 0x00ff0000 1638 #define R92C_TXDW0_OFFSET_S 16 1639 #define R92C_TXDW0_BMCAST 0x01000000 1640 #define R92C_TXDW0_LSG 0x04000000 1641 #define R92C_TXDW0_FSG 0x08000000 1642 #define R92C_TXDW0_OWN 0x80000000 1643 1644 #define R92C_TXDW1_MACID_M 0x0000001f 1645 #define R92C_TXDW1_MACID_S 0 1646 #define R88E_TXDW1_MACID_M 0x0000003f 1647 #define R88E_TXDW1_MACID_S 0 1648 #define R92E_TXDW1_MACID_M 0x0000007f 1649 #define R92E_TXDW1_MACID_S 0 1650 #define R92C_TXDW1_AGGEN 0x00000020 1651 #define R92C_TXDW1_AGGBK 0x00000040 1652 #define R92C_TXDW1_QSEL_M 0x00001f00 1653 #define R92C_TXDW1_QSEL_S 8 1654 #define R92C_TXDW1_QSEL_BE 0x00 1655 #define R92C_TXDW1_QSEL_BK 0x02 1656 #define R92C_TXDW1_QSEL_VI 0x05 1657 #define R92C_TXDW1_QSEL_VO 0x07 1658 #define R92C_TXDW1_QSEL_BEACON 0x10 1659 #define R92C_TXDW1_QSEL_HIGH 0x11 1660 #define R92C_TXDW1_QSEL_MGNT 0x12 1661 #define R92C_TXDW1_QSEL_CMD 0x13 1662 #define R92C_TXDW1_RAID_M 0x000f0000 1663 #define R92C_TXDW1_RAID_S 16 1664 #define R92C_TXDW1_CIPHER_M 0x00c00000 1665 #define R92C_TXDW1_CIPHER_S 22 1666 #define R92C_TXDW1_CIPHER_NONE 0 1667 #define R92C_TXDW1_CIPHER_RC4 1 1668 #define R92C_TXDW1_CIPHER_AES 3 1669 #define R92C_TXDW1_PKTOFF_M 0x7c000000 1670 #define R92C_TXDW1_PKTOFF_S 26 1671 1672 #define R88E_TXDW2_AGGBK 0x00010000 1673 #define R92C_TXDW2_CCX_RPT 0x00080000 1674 1675 #define R92E_TXDW3_DRVRATE 0x0100 1676 #define R23A_TXDW3_TXRPTEN 0x4000 1677 #define R92C_TXDW3_HWSEQEN 0x8000 1678 1679 #define R92C_TXDW4_RTSRATE_M 0x0000001f 1680 #define R92C_TXDW4_RTSRATE_S 0 1681 #define R92C_TXDW4_QOS 0x00000040 1682 #define R92C_TXDW4_HWSEQ 0x00000080 1683 #define R92C_TXDW4_DRVRATE 0x00000100 1684 #define R92C_TXDW4_CTS2SELF 0x00000800 1685 #define R92C_TXDW4_RTSEN 0x00001000 1686 #define R92C_TXDW4_HWRTSEN 0x00002000 1687 #define R92C_TXDW4_SCO_M 0x003f0000 1688 #define R92C_TXDW4_SCO_S 20 1689 #define R92C_TXDW4_SCO_SCA 1 1690 #define R92C_TXDW4_SCO_SCB 2 1691 #define R92C_TXDW4_SHORTPRE 0x01000000 1692 #define R92C_TXDW4_40MHZ 0x02000000 1693 #define R92C_TXDW4_RTS_SHORT 0x04000000 1694 1695 #define R92E_TXDW4_DATARATE_M 0x0000007f 1696 #define R92E_TXDW4_DATARATE_S 0 1697 #define R92E_TXDW4_DATARATEFB_M 0x00001f00 1698 #define R92E_TXDW4_DATARATEFB_S 8 1699 #define R92E_TXDW4_RTSRATEFB_M 0x0001e000 1700 #define R92E_TXDW4_RTSRATEFB_S 13 1701 #define R92E_TXDW4_RETRYLMT_ENA 0x00020000 1702 #define R92E_TXDW4_RETRYLMT_M 0x00fc0000 1703 #define R92E_TXDW4_RETRYLMT_S 18 1704 #define R92E_TXDW4_RTSRATE_M 0x1f000000 1705 #define R92E_TXDW4_RTSRATE_S 24 1706 1707 #define R92C_TXDW5_DATARATE_M 0x0000003f 1708 #define R92C_TXDW5_DATARATE_S 0 1709 #define R92C_TXDW5_SGI 0x00000040 1710 #define R92C_TXDW5_DATARATE_FBLIMIT_M 0x00001f00 1711 #define R92C_TXDW5_DATARATE_FBLIMIT_S 8 1712 #define R92C_TXDW5_RTSRATE_FBLIMIT_M 0x0001e000 1713 #define R92C_TXDW5_RTSRATE_FBLIMIT_S 13 1714 #define R92C_TXDW5_RETRY_LIMIT_ENABLE 0x00020000 1715 #define R92C_TXDW5_DATA_RETRY_LIMIT_M 0x00fc0000 1716 #define R92C_TXDW5_DATA_RETRY_LIMIT_S 18 1717 #define R92C_TXDW5_AGGNUM_M 0xff000000 1718 #define R92C_TXDW5_AGGNUM_S 24 1719 1720 #define R92E_TXDSEQ2_HWSEQ_S 11 1721 #define R92E_TXDSEQ2_HWSEQ_M 0x0000ffff 1722 1723 /* 1724 * C2H event structure. 1725 */ 1726 #define R92C_C2H_MSG_MAX_LEN 16 1727 1728 struct r92c_c2h_evt { 1729 uint8_t evtb0; 1730 #define R92C_C2H_EVTB0_ID_M 0x0f 1731 #define R92C_C2H_EVTB0_ID_S 0 1732 #define R92C_C2H_EVTB0_LEN_M 0xf0 1733 #define R92C_C2H_EVTB0_LEN_S 4 1734 1735 uint8_t seq; 1736 1737 /* Followed by payload (see below). */ 1738 } __packed; 1739 1740 /* Bits for R92C_C2HEVT_CLEAR. */ 1741 #define R92C_C2HEVT_HOST_CLOSE 0x00 1742 #define R92C_C2HEVT_FW_CLOSE 0xff 1743 1744 /* 1745 * C2H event types. 1746 */ 1747 #define R92C_C2HEVT_DEBUG 0 1748 #define R92C_C2HEVT_TX_REPORT 3 1749 #define R92C_C2HEVT_EXT_RA_RPT 6 1750 1751 /* Structure for R92C_C2H_EVT_TX_REPORT event. */ 1752 struct r92c_c2h_tx_rpt { 1753 uint8_t rptb0; 1754 #define R92C_RPTB0_RETRY_CNT_M 0x3f 1755 #define R92C_RPTB0_RETRY_CNT_S 0 1756 1757 uint8_t rptb1; /* XXX junk */ 1758 #define R92C_RPTB1_RTS_RETRY_CNT_M 0x3f 1759 #define R92C_RPTB1_RTS_RETRY_CNT_S 0 1760 1761 uint8_t queue_time_low; 1762 uint8_t queue_time_high; 1763 uint8_t rptb4; 1764 #define R92C_RPTB4_MISSED_PKT_NUM_M 0x1f 1765 #define R92C_RPTB4_MISSED_PKT_NUM_S 0 1766 1767 uint8_t rptb5; 1768 #define R92C_RPTB5_MACID_M 0x1f 1769 #define R92C_RPTB5_MACID_S 0 1770 #define R92C_RPTB5_DES1_FRAGSSN_M 0xe0 1771 #define R92C_RPTB5_DES1_FRAGSSN_S 5 1772 1773 uint8_t rptb6; 1774 #define R92C_RPTB6_RPT_PKT_NUM_M 0x1f 1775 #define R92C_RPTB6_RPT_PKT_NUM_S 0 1776 #define R92C_RPTB6_PKT_DROP 0x20 1777 #define R92C_RPTB6_LIFE_EXPIRE 0x40 1778 #define R92C_RPTB6_RETRY_OVER 0x80 1779 1780 uint8_t rptb7; 1781 #define R92C_RPTB7_EDCA_M 0x0f 1782 #define R92C_RPTB7_EDCA_S 0 1783 #define R92C_RPTB7_BMC 0x20 1784 #define R92C_RPTB7_PKT_OK 0x40 1785 #define R92C_RPTB7_INT_CCX 0x80 1786 } __packed; 1787 1788 struct r92e_c2h_tx_rpt { 1789 uint8_t rptb0; 1790 #define R92E_RPTB0_QSEL_M 0x1f 1791 #define R92E_RPTB0_QSEL_S 0 1792 #define R92E_RPTB0_BC 0x20 1793 #define R92E_RPTB0_LIFE_EXPIRE 0x40 1794 #define R92E_RPTB0_RETRY_OVER 0x80 1795 1796 uint8_t macid; 1797 1798 uint8_t rptb2; 1799 #define R92E_RPTB2_RETRY_CNT_M 0x3f 1800 #define R92E_RPTB2_RETRY_CNT_S 0 1801 1802 uint8_t queue_time_low; 1803 uint8_t queue_time_high; 1804 uint8_t final_rate; 1805 uint16_t reserved; 1806 } __packed; 1807 1808 /* 1809 * MAC initialization values. 1810 */ 1811 static const struct { 1812 uint16_t reg; 1813 uint8_t val; 1814 } rtl8192ce_mac[] = { 1815 { 0x420, 0x80 }, { 0x423, 0x00 }, { 0x430, 0x00 }, { 0x431, 0x00 }, 1816 { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 }, 1817 { 0x436, 0x06 }, { 0x437, 0x07 }, { 0x438, 0x00 }, { 0x439, 0x00 }, 1818 { 0x43a, 0x00 }, { 0x43b, 0x01 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, 1819 { 0x43e, 0x06 }, { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 }, 1820 { 0x442, 0x00 }, { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f }, 1821 { 0x447, 0x00 }, { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 }, 1822 { 0x45b, 0xb9 }, { 0x460, 0x88 }, { 0x461, 0x88 }, { 0x462, 0x06 }, 1823 { 0x463, 0x03 }, { 0x4c8, 0x04 }, { 0x4c9, 0x08 }, { 0x4cc, 0x02 }, 1824 { 0x4cd, 0x28 }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 }, 1825 { 0x502, 0x2f }, { 0x503, 0x00 }, { 0x504, 0x28 }, { 0x505, 0xa3 }, 1826 { 0x506, 0x5e }, { 0x507, 0x00 }, { 0x508, 0x2b }, { 0x509, 0xa4 }, 1827 { 0x50a, 0x5e }, { 0x50b, 0x00 }, { 0x50c, 0x4f }, { 0x50d, 0xa4 }, 1828 { 0x50e, 0x00 }, { 0x50f, 0x00 }, { 0x512, 0x1c }, { 0x514, 0x0a }, 1829 { 0x515, 0x10 }, { 0x516, 0x0a }, { 0x517, 0x10 }, { 0x51a, 0x16 }, 1830 { 0x524, 0x0f }, { 0x525, 0x4f }, { 0x546, 0x20 }, { 0x547, 0x00 }, 1831 { 0x559, 0x02 }, { 0x55a, 0x02 }, { 0x55d, 0xff }, { 0x605, 0x30 }, 1832 { 0x608, 0x0e }, { 0x609, 0x2a }, { 0x652, 0x20 }, { 0x63c, 0x0a }, 1833 { 0x63d, 0x0e }, { 0x700, 0x21 }, { 0x701, 0x43 }, { 0x702, 0x65 }, 1834 { 0x703, 0x87 }, { 0x708, 0x21 }, { 0x709, 0x43 }, { 0x70a, 0x65 }, 1835 { 0x70b, 0x87 } 1836 }, rtl8188eu_mac[] = { 1837 { 0x026, 0x41 }, { 0x027, 0x35 }, { 0x040, 0x00 }, { 0x428, 0x0a }, 1838 { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x01 }, { 0x432, 0x02 }, 1839 { 0x433, 0x04 }, { 0x434, 0x05 }, { 0x435, 0x06 }, { 0x436, 0x07 }, 1840 { 0x437, 0x08 }, { 0x438, 0x00 }, { 0x439, 0x00 }, { 0x43a, 0x01 }, 1841 { 0x43b, 0x02 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x06 }, 1842 { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 }, 1843 { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f }, { 0x447, 0x00 }, 1844 { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 }, { 0x45b, 0xb9 }, 1845 { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x480, 0x08 }, { 0x4c8, 0xff }, 1846 { 0x4c9, 0x08 }, { 0x4cc, 0xff }, { 0x4cd, 0xff }, { 0x4ce, 0x01 }, 1847 { 0x4d3, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 }, { 0x502, 0x2f }, 1848 { 0x503, 0x00 }, { 0x504, 0x28 }, { 0x505, 0xa3 }, { 0x506, 0x5e }, 1849 { 0x507, 0x00 }, { 0x508, 0x2b }, { 0x509, 0xa4 }, { 0x50a, 0x5e }, 1850 { 0x50b, 0x00 }, { 0x50c, 0x4f }, { 0x50d, 0xa4 }, { 0x50e, 0x00 }, 1851 { 0x50f, 0x00 }, { 0x512, 0x1c }, { 0x514, 0x0a }, { 0x516, 0x0a }, 1852 { 0x525, 0x4f }, { 0x550, 0x10 }, { 0x551, 0x10 }, { 0x559, 0x02 }, 1853 { 0x55d, 0xff }, { 0x605, 0x30 }, { 0x608, 0x0e }, { 0x609, 0x2a }, 1854 { 0x620, 0xff }, { 0x621, 0xff }, { 0x622, 0xff }, { 0x623, 0xff }, 1855 { 0x624, 0xff }, { 0x625, 0xff }, { 0x626, 0xff }, { 0x627, 0xff }, 1856 { 0x652, 0x20 }, { 0x63c, 0x0a }, { 0x63d, 0x0a }, { 0x63e, 0x0e }, 1857 { 0x63f, 0x0e }, { 0x640, 0x40 }, { 0x66e, 0x05 }, { 0x700, 0x21 }, 1858 { 0x701, 0x43 }, { 0x702, 0x65 }, { 0x703, 0x87 }, { 0x708, 0x21 }, 1859 { 0x709, 0x43 }, { 0x70a, 0x65 }, { 0x70b, 0x87 } 1860 }, rtl8188ftv_mac[] = { 1861 { 0x024, 0xdf }, { 0x025, 0x07 }, { 0x02b, 0x1c }, { 0x283, 0x20 }, 1862 { 0x421, 0x0f }, { 0x428, 0x0a }, { 0x429, 0x10 }, { 0x430, 0x00 }, 1863 { 0x431, 0x00 }, { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, 1864 { 0x435, 0x05 }, { 0x436, 0x07 }, { 0x437, 0x08 }, { 0x43c, 0x04 }, 1865 { 0x43d, 0x05 }, { 0x43e, 0x07 }, { 0x43f, 0x08 }, { 0x440, 0x5d }, 1866 { 0x441, 0x01 }, { 0x442, 0x00 }, { 0x444, 0x10 }, { 0x445, 0x00 }, 1867 { 0x446, 0x00 }, { 0x447, 0x00 }, { 0x448, 0x00 }, { 0x449, 0xf0 }, 1868 { 0x44a, 0x0f }, { 0x44b, 0x3e }, { 0x44c, 0x10 }, { 0x44d, 0x00 }, 1869 { 0x44e, 0x00 }, { 0x44f, 0x00 }, { 0x450, 0x00 }, { 0x451, 0xf0 }, 1870 { 0x452, 0x0f }, { 0x453, 0x00 }, { 0x456, 0x5e }, { 0x460, 0x44 }, 1871 { 0x461, 0x44 }, { 0x4bc, 0xc0 }, { 0x4c8, 0xff }, { 0x4c9, 0x08 }, 1872 { 0x4cc, 0xff }, { 0x4cd, 0xff }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, 1873 { 0x501, 0xa2 }, { 0x502, 0x2f }, { 0x503, 0x00 }, { 0x504, 0x28 }, 1874 { 0x505, 0xa3 }, { 0x506, 0x5e }, { 0x507, 0x00 }, { 0x508, 0x2b }, 1875 { 0x509, 0xa4 }, { 0x50a, 0x5e }, { 0x50b, 0x00 }, { 0x50c, 0x4f }, 1876 { 0x50d, 0xa4 }, { 0x50e, 0x00 }, { 0x50f, 0x00 }, { 0x512, 0x1c }, 1877 { 0x514, 0x0a }, { 0x516, 0x0a }, { 0x525, 0x4f }, { 0x550, 0x10 }, 1878 { 0x551, 0x10 }, { 0x559, 0x02 }, { 0x55c, 0x28 }, { 0x55d, 0xff }, 1879 { 0x605, 0x30 }, { 0x608, 0x0e }, { 0x609, 0x2a }, { 0x620, 0xff }, 1880 { 0x621, 0xff }, { 0x622, 0xff }, { 0x623, 0xff }, { 0x624, 0xff }, 1881 { 0x625, 0xff }, { 0x626, 0xff }, { 0x627, 0xff }, { 0x638, 0x28 }, 1882 { 0x63c, 0x0a }, { 0x63d, 0x0a }, { 0x63e, 0x0e }, { 0x63f, 0x0e }, 1883 { 0x640, 0x40 }, { 0x642, 0x40 }, { 0x643, 0x00 }, { 0x652, 0xc8 }, 1884 { 0x66e, 0x05 }, { 0x700, 0x21 }, { 0x701, 0x43 }, { 0x702, 0x65 }, 1885 { 0x703, 0x87 }, { 0x708, 0x21 }, { 0x709, 0x43 }, { 0x70a, 0x65 }, 1886 { 0x70b, 0x87 } 1887 }, rtl8192cu_mac[] = { 1888 { 0x420, 0x80 }, { 0x423, 0x00 }, { 0x430, 0x00 }, { 0x431, 0x00 }, 1889 { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 }, 1890 { 0x436, 0x06 }, { 0x437, 0x07 }, { 0x438, 0x00 }, { 0x439, 0x00 }, 1891 { 0x43a, 0x00 }, { 0x43b, 0x01 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, 1892 { 0x43e, 0x06 }, { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 }, 1893 { 0x442, 0x00 }, { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f }, 1894 { 0x447, 0x00 }, { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 }, 1895 { 0x45b, 0xb9 }, { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x462, 0x08 }, 1896 { 0x463, 0x03 }, { 0x4c8, 0xff }, { 0x4c9, 0x08 }, { 0x4cc, 0xff }, 1897 { 0x4cd, 0xff }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 }, 1898 { 0x502, 0x2f }, { 0x503, 0x00 }, { 0x504, 0x28 }, { 0x505, 0xa3 }, 1899 { 0x506, 0x5e }, { 0x507, 0x00 }, { 0x508, 0x2b }, { 0x509, 0xa4 }, 1900 { 0x50a, 0x5e }, { 0x50b, 0x00 }, { 0x50c, 0x4f }, { 0x50d, 0xa4 }, 1901 { 0x50e, 0x00 }, { 0x50f, 0x00 }, { 0x512, 0x1c }, { 0x514, 0x0a }, 1902 { 0x515, 0x10 }, { 0x516, 0x0a }, { 0x517, 0x10 }, { 0x51a, 0x16 }, 1903 { 0x524, 0x0f }, { 0x525, 0x4f }, { 0x546, 0x40 }, { 0x547, 0x00 }, 1904 { 0x550, 0x10 }, { 0x551, 0x10 }, { 0x559, 0x02 }, { 0x55a, 0x02 }, 1905 { 0x55d, 0xff }, { 0x605, 0x30 }, { 0x608, 0x0e }, { 0x609, 0x2a }, 1906 { 0x652, 0x20 }, { 0x63c, 0x0a }, { 0x63d, 0x0e }, { 0x63e, 0x0a }, 1907 { 0x63f, 0x0e }, { 0x66e, 0x05 }, { 0x700, 0x21 }, { 0x701, 0x43 }, 1908 { 0x702, 0x65 }, { 0x703, 0x87 }, { 0x708, 0x21 }, { 0x709, 0x43 }, 1909 { 0x70a, 0x65 }, { 0x70b, 0x87 } 1910 }, rtl8192eu_mac[]={ 1911 { 0x011, 0xeb }, { 0x012, 0x07 }, { 0x014, 0x75 }, { 0x303, 0xa7 }, 1912 { 0x421, 0x0f }, { 0x428, 0x0a }, { 0x429, 0x10 }, { 0x430, 0x00 }, 1913 { 0x431, 0x00 }, { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, 1914 { 0x435, 0x05 }, { 0x436, 0x07 }, { 0x437, 0x08 }, { 0x43c, 0x04 }, 1915 { 0x43d, 0x05 }, { 0x43e, 0x07 }, { 0x43f, 0x08 }, { 0x440, 0x5d }, 1916 { 0x441, 0x01 }, { 0x442, 0x00 }, { 0x444, 0x10 }, { 0x445, 0x00 }, 1917 { 0x446, 0x00 }, { 0x447, 0x00 }, { 0x448, 0x00 }, { 0x449, 0xf0 }, 1918 { 0x44a, 0x0f }, { 0x44b, 0x3e }, { 0x44c, 0x10 }, { 0x44d, 0x00 }, 1919 { 0x44e, 0x00 }, { 0x44f, 0x00 }, { 0x450, 0x00 }, { 0x451, 0xf0 }, 1920 { 0x452, 0x0f }, { 0x453, 0x00 }, { 0x456, 0x5e }, { 0x460, 0x66 }, 1921 { 0x461, 0x66 }, { 0x4c8, 0xff }, { 0x4c9, 0x08 }, { 0x4cc, 0xff }, 1922 { 0x4cd, 0xff }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 }, 1923 { 0x502, 0x2f }, { 0x503, 0x00 }, { 0x504, 0x28 }, { 0x505, 0xa3 }, 1924 { 0x506, 0x5e }, { 0x507, 0x00 }, { 0x508, 0x2b }, { 0x509, 0xa4 }, 1925 { 0x50a, 0x5e }, { 0x50b, 0x00 }, { 0x50c, 0x4f }, { 0x50d, 0xa4 }, 1926 { 0x50e, 0x00 }, { 0x50f, 0x00 }, { 0x512, 0x1c }, { 0x514, 0x0a }, 1927 { 0x516, 0x0a }, { 0x525, 0x4f }, { 0x540, 0x12 }, { 0x541, 0x64 }, 1928 { 0x550, 0x10 }, { 0x551, 0x10 }, { 0x559, 0x02 }, { 0x55c, 0x50 }, 1929 { 0x55d, 0xff }, { 0x605, 0x30 }, { 0x608, 0x0e }, { 0x609, 0x2a }, 1930 { 0x620, 0xff }, { 0x621, 0xff }, { 0x622, 0xff }, { 0x623, 0xff }, 1931 { 0x624, 0xff }, { 0x625, 0xff }, { 0x626, 0xff }, { 0x627, 0xff }, 1932 { 0x638, 0x50 }, { 0x63c, 0x0a }, { 0x63d, 0x0a }, { 0x63e, 0x0e }, 1933 { 0x63f, 0x0e }, { 0x640, 0x40 }, { 0x642, 0x40 }, { 0x643, 0x00 }, 1934 { 0x652, 0x2b }, { 0x66e, 0x05 }, { 0x700, 0x21 }, { 0x701, 0x43 }, 1935 { 0x702, 0x65 }, { 0x703, 0x87 }, { 0x708, 0x21 }, { 0x709, 0x43 }, 1936 { 0x70a, 0x65 }, { 0x70b, 0x87 } 1937 }; 1938 1939 /* 1940 * Baseband initialization values. 1941 */ 1942 struct r92c_bb_prog { 1943 int count; 1944 const uint16_t *regs; 1945 const uint32_t *vals; 1946 int agccount; 1947 const uint32_t *agcvals; 1948 }; 1949 1950 /* 1951 * RTL8192CU and RTL8192CE-VAU. 1952 */ 1953 static const uint32_t rtl8192ce_bb_vals_1t[] = { 1954 0x0011800f, 0x00ffdb83, 0x80040000, 0x00000001, 0x0000fc00, 1955 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 1956 0x01000100, 0x00390004, 0x00000000, 0x00000000, 0x00000000, 1957 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000, 1958 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x569a569a, 1959 0x001b25a4, 0x66e60230, 0x061f0130, 0x00000000, 0x32323200, 1960 0x07000700, 0x22004000, 0x00000808, 0x00000000, 0xc0083070, 1961 0x000004d5, 0x00000000, 0xccc000c0, 0x00000800, 0xfffffffe, 1962 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 1963 0x81121111, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 1964 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 1965 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 1966 0x48071d40, 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x08800000, 1967 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 1968 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 1969 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 1970 0x69543420, 0x43bc0094, 0x69543420, 0x433c0094, 0x00000000, 1971 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db, 1972 0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100, 1973 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 1974 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 1975 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 1976 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 1977 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 1978 0x00080740, 0x00020401, 0x0000907f, 0x20010201, 0xa0633333, 1979 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 1980 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 1981 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 1982 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 1983 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 1984 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 1985 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 1986 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 1987 0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 0x631b25a0, 1988 0x631b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 1989 0x631b25a0, 0x081b25a0, 0x631b25a0, 0x631b25a0, 0x631b25a0, 1990 0x631b25a0, 0x001b25a0, 0x001b25a0, 0x6b1b25a0, 0x00000003, 1991 0x00000000, 0x00000300, 1992 }; 1993 1994 static const uint16_t rtl8192ce_bb_regs[] = { 1995 0x024, 0x028, 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818, 1996 0x81c, 0x820, 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c, 1997 0x840, 0x844, 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 0x860, 1998 0x864, 0x868, 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x880, 0x884, 1999 0x888, 0x88c, 0x890, 0x894, 0x898, 0x89c, 0x900, 0x904, 0x908, 2000 0x90c, 0xa00, 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 0xa1c, 2001 0xa20, 0xa24, 0xa28, 0xa2c, 0xa70, 0xa74, 0xc00, 0xc04, 0xc08, 2002 0xc0c, 0xc10, 0xc14, 0xc18, 0xc1c, 0xc20, 0xc24, 0xc28, 0xc2c, 2003 0xc30, 0xc34, 0xc38, 0xc3c, 0xc40, 0xc44, 0xc48, 0xc4c, 0xc50, 2004 0xc54, 0xc58, 0xc5c, 0xc60, 0xc64, 0xc68, 0xc6c, 0xc70, 0xc74, 2005 0xc78, 0xc7c, 0xc80, 0xc84, 0xc88, 0xc8c, 0xc90, 0xc94, 0xc98, 2006 0xc9c, 0xca0, 0xca4, 0xca8, 0xcac, 0xcb0, 0xcb4, 0xcb8, 0xcbc, 2007 0xcc0, 0xcc4, 0xcc8, 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc, 0xce0, 2008 0xce4, 0xce8, 0xcec, 0xd00, 0xd04, 0xd08, 0xd0c, 0xd10, 0xd14, 2009 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38, 0xd3c, 0xd40, 0xd44, 0xd48, 2010 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c, 0xd60, 0xd64, 0xd68, 0xd6c, 2011 0xd70, 0xd74, 0xd78, 0xe00, 0xe04, 0xe08, 0xe10, 0xe14, 0xe18, 2012 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 0xe48, 2013 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c, 0xe60, 0xe68, 0xe6c, 0xe70, 2014 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 0xed0, 0xed4, 2015 0xed8, 0xedc, 0xee0, 0xeec, 0xf14, 0xf4c, 0xf00 2016 }; 2017 2018 static const uint32_t rtl8192ce_bb_vals[] = { 2019 0x0011800d, 0x00ffdb83, 0x80040002, 0x00000003, 0x0000fc00, 2020 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 2021 0x01000100, 0x00390004, 0x01000100, 0x00390004, 0x27272727, 2022 0x27272727, 0x27272727, 0x27272727, 0x00010000, 0x00010000, 2023 0x27272727, 0x27272727, 0x00000000, 0x00000000, 0x569a569a, 2024 0x0c1b25a4, 0x66e60230, 0x061f0130, 0x27272727, 0x2b2b2b27, 2025 0x07000700, 0x22184000, 0x08080808, 0x00000000, 0xc0083070, 2026 0x000004d5, 0x00000000, 0xcc0000c0, 0x00000800, 0xfffffffe, 2027 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 2028 0x81121313, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 2029 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 2030 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 2031 0x48071d40, 0x03a05633, 0x000000e4, 0x6c6c6c6c, 0x08800000, 2032 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 2033 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 2034 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 2035 0x6954341e, 0x43bc0094, 0x6954341e, 0x433c0094, 0x00000000, 2036 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db, 2037 0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100, 2038 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 2039 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 2040 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 2041 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 2042 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 2043 0x00080740, 0x00020403, 0x0000907f, 0x20010201, 0xa0633333, 2044 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 2045 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 2046 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 2047 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 2048 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 2049 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 2050 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 2051 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 2052 0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 0x63db25a4, 2053 0x63db25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 2054 0x63db25a4, 0x0c1b25a4, 0x63db25a4, 0x63db25a4, 0x63db25a4, 2055 0x63db25a4, 0x001b25a4, 0x001b25a4, 0x6fdb25a4, 0x00000003, 2056 0x00000000, 0x00000300 2057 }; 2058 2059 static const uint32_t rtl8192ce_bb_vals_2t[] = { 2060 0x0011800f, 0x00ffdb83, 0x80040002, 0x00000003, 0x0000fc00, 2061 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 2062 0x01000100, 0x00390004, 0x01000100, 0x00390004, 0x27272727, 2063 0x27272727, 0x27272727, 0x27272727, 0x00010000, 0x00010000, 2064 0x27272727, 0x27272727, 0x00000000, 0x00000000, 0x569a569a, 2065 0x0c1b25a4, 0x66e60230, 0x061f0130, 0x27272727, 0x2b2b2b27, 2066 0x07000700, 0x22184000, 0x08080808, 0x00000000, 0xc0083070, 2067 0x000004d5, 0x00000000, 0xcc0000c0, 0x00000800, 0xfffffffe, 2068 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 2069 0x81121313, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 2070 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 2071 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 2072 0x48071d40, 0x03a05633, 0x000000e4, 0x6c6c6c6c, 0x08800000, 2073 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 2074 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 2075 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 2076 0x69543420, 0x43bc0094, 0x69543420, 0x433c0094, 0x00000000, 2077 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db, 2078 0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100, 2079 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 2080 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 2081 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 2082 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 2083 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 2084 0x00080740, 0x00020403, 0x0000907f, 0x20010201, 0xa0633333, 2085 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 2086 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 2087 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 2088 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 2089 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 2090 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 2091 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 2092 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 2093 0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 0x63db25a4, 2094 0x63db25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 2095 0x63db25a4, 0x0c1b25a4, 0x63db25a4, 0x63db25a4, 0x63db25a4, 2096 0x63db25a4, 0x001b25a4, 0x001b25a4, 0x6fdb25a4, 0x00000003, 2097 0x00000000, 0x00000300 2098 }; 2099 static const uint32_t rtl8192ce_agc_vals[] = { 2100 0x7b000001, 0x7b010001, 0x7b020001, 0x7b030001, 0x7b040001, 2101 0x7b050001, 0x7a060001, 0x79070001, 0x78080001, 0x77090001, 2102 0x760a0001, 0x750b0001, 0x740c0001, 0x730d0001, 0x720e0001, 2103 0x710f0001, 0x70100001, 0x6f110001, 0x6e120001, 0x6d130001, 2104 0x6c140001, 0x6b150001, 0x6a160001, 0x69170001, 0x68180001, 2105 0x67190001, 0x661a0001, 0x651b0001, 0x641c0001, 0x631d0001, 2106 0x621e0001, 0x611f0001, 0x60200001, 0x49210001, 0x48220001, 2107 0x47230001, 0x46240001, 0x45250001, 0x44260001, 0x43270001, 2108 0x42280001, 0x41290001, 0x402a0001, 0x262b0001, 0x252c0001, 2109 0x242d0001, 0x232e0001, 0x222f0001, 0x21300001, 0x20310001, 2110 0x06320001, 0x05330001, 0x04340001, 0x03350001, 0x02360001, 2111 0x01370001, 0x00380001, 0x00390001, 0x003a0001, 0x003b0001, 2112 0x003c0001, 0x003d0001, 0x003e0001, 0x003f0001, 0x7b400001, 2113 0x7b410001, 0x7b420001, 0x7b430001, 0x7b440001, 0x7b450001, 2114 0x7a460001, 0x79470001, 0x78480001, 0x77490001, 0x764a0001, 2115 0x754b0001, 0x744c0001, 0x734d0001, 0x724e0001, 0x714f0001, 2116 0x70500001, 0x6f510001, 0x6e520001, 0x6d530001, 0x6c540001, 2117 0x6b550001, 0x6a560001, 0x69570001, 0x68580001, 0x67590001, 2118 0x665a0001, 0x655b0001, 0x645c0001, 0x635d0001, 0x625e0001, 2119 0x615f0001, 0x60600001, 0x49610001, 0x48620001, 0x47630001, 2120 0x46640001, 0x45650001, 0x44660001, 0x43670001, 0x42680001, 2121 0x41690001, 0x406a0001, 0x266b0001, 0x256c0001, 0x246d0001, 2122 0x236e0001, 0x226f0001, 0x21700001, 0x20710001, 0x06720001, 2123 0x05730001, 0x04740001, 0x03750001, 0x02760001, 0x01770001, 2124 0x00780001, 0x00790001, 0x007a0001, 0x007b0001, 0x007c0001, 2125 0x007d0001, 0x007e0001, 0x007f0001, 0x3800001e, 0x3801001e, 2126 0x3802001e, 0x3803001e, 0x3804001e, 0x3805001e, 0x3806001e, 2127 0x3807001e, 0x3808001e, 0x3c09001e, 0x3e0a001e, 0x400b001e, 2128 0x440c001e, 0x480d001e, 0x4c0e001e, 0x500f001e, 0x5210001e, 2129 0x5611001e, 0x5a12001e, 0x5e13001e, 0x6014001e, 0x6015001e, 2130 0x6016001e, 0x6217001e, 0x6218001e, 0x6219001e, 0x621a001e, 2131 0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e 2132 }; 2133 2134 static const struct r92c_bb_prog rtl8192ce_bb_prog = { 2135 nitems(rtl8192ce_bb_regs), 2136 rtl8192ce_bb_regs, 2137 rtl8192ce_bb_vals, 2138 nitems(rtl8192ce_agc_vals), 2139 rtl8192ce_agc_vals 2140 }; 2141 2142 static const struct r92c_bb_prog rtl8192ce_bb_prog_2t = { 2143 nitems(rtl8192ce_bb_regs), 2144 rtl8192ce_bb_regs, 2145 rtl8192ce_bb_vals_2t, 2146 nitems(rtl8192ce_agc_vals), 2147 rtl8192ce_agc_vals 2148 }; 2149 2150 static const struct r92c_bb_prog rtl8192ce_bb_prog_1t = { 2151 nitems(rtl8192ce_bb_regs), 2152 rtl8192ce_bb_regs, 2153 rtl8192ce_bb_vals_1t, 2154 nitems(rtl8192ce_agc_vals), 2155 rtl8192ce_agc_vals 2156 }; 2157 2158 /* 2159 * RTL8188CU. 2160 */ 2161 static const uint32_t rtl8192cu_bb_vals[] = { 2162 0x0011800d, 0x00ffdb83, 0x80040002, 0x00000003, 0x0000fc00, 2163 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 2164 0x01000100, 0x00390004, 0x01000100, 0x00390004, 0x27272727, 2165 0x27272727, 0x27272727, 0x27272727, 0x00010000, 0x00010000, 2166 0x27272727, 0x27272727, 0x00000000, 0x00000000, 0x569a569a, 2167 0x0c1b25a4, 0x66e60230, 0x061f0130, 0x27272727, 0x2b2b2b27, 2168 0x07000700, 0x22184000, 0x08080808, 0x00000000, 0xc0083070, 2169 0x000004d5, 0x00000000, 0xcc0000c0, 0x00000800, 0xfffffffe, 2170 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 2171 0x81121313, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 2172 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 2173 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 2174 0x48071d40, 0x03a05633, 0x000000e4, 0x6c6c6c6c, 0x08800000, 2175 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 2176 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 2177 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 2178 0x6954341e, 0x43bc0094, 0x6954341e, 0x433c0094, 0x00000000, 2179 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x0186115b, 2180 0x0000001f, 0x00b99612, 0x40000100, 0x20f60000, 0x40000100, 2181 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 2182 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 2183 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 2184 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 2185 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 2186 0x00080740, 0x00020403, 0x0000907f, 0x20010201, 0xa0633333, 2187 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 2188 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 2189 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 2190 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 2191 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 2192 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 2193 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 2194 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 2195 0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 0x63db25a4, 2196 0x63db25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 0x0c1b25a4, 2197 0x63db25a4, 0x0c1b25a4, 0x63db25a4, 0x63db25a4, 0x63db25a4, 2198 0x63db25a4, 0x001b25a4, 0x001b25a4, 0x6fdb25a4, 0x00000003, 2199 0x00000000, 0x00000300 2200 }; 2201 2202 static const struct r92c_bb_prog rtl8192cu_bb_prog = { 2203 nitems(rtl8192ce_bb_regs), 2204 rtl8192ce_bb_regs, 2205 rtl8192cu_bb_vals, 2206 nitems(rtl8192ce_agc_vals), 2207 rtl8192ce_agc_vals 2208 }; 2209 2210 /* 2211 * RTL8188CE-VAU. 2212 */ 2213 static const uint32_t rtl8188ce_bb_vals[] = { 2214 0x0011800d, 0x00ffdb83, 0x80040000, 0x00000001, 0x0000fc00, 2215 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 2216 0x01000100, 0x00390004, 0x00000000, 0x00000000, 0x00000000, 2217 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000, 2218 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x569a569a, 2219 0x001b25a4, 0x66e60230, 0x061f0130, 0x00000000, 0x32323200, 2220 0x07000700, 0x22004000, 0x00000808, 0x00000000, 0xc0083070, 2221 0x000004d5, 0x00000000, 0xccc000c0, 0x00000800, 0xfffffffe, 2222 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 2223 0x81121111, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 2224 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 2225 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 2226 0x48071d40, 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x08800000, 2227 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 2228 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 2229 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 2230 0x6954341e, 0x43bc0094, 0x6954341e, 0x433c0094, 0x00000000, 2231 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db, 2232 0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100, 2233 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 2234 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 2235 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 2236 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 2237 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 2238 0x00080740, 0x00020401, 0x0000907f, 0x20010201, 0xa0633333, 2239 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 2240 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 2241 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 2242 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 2243 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 2244 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 2245 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 2246 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 2247 0x02140102, 0x28160d05, 0x00000008, 0x001b25a4, 0x631b25a0, 2248 0x631b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 2249 0x631b25a0, 0x081b25a0, 0x631b25a0, 0x631b25a0, 0x631b25a0, 2250 0x631b25a0, 0x001b25a0, 0x001b25a0, 0x6b1b25a0, 0x00000003, 2251 0x00000000, 0x00000300 2252 }; 2253 2254 static const uint32_t rtl8188ce_agc_vals[] = { 2255 0x7b000001, 0x7b010001, 0x7b020001, 0x7b030001, 0x7b040001, 2256 0x7b050001, 0x7a060001, 0x79070001, 0x78080001, 0x77090001, 2257 0x760a0001, 0x750b0001, 0x740c0001, 0x730d0001, 0x720e0001, 2258 0x710f0001, 0x70100001, 0x6f110001, 0x6e120001, 0x6d130001, 2259 0x6c140001, 0x6b150001, 0x6a160001, 0x69170001, 0x68180001, 2260 0x67190001, 0x661a0001, 0x651b0001, 0x641c0001, 0x631d0001, 2261 0x621e0001, 0x611f0001, 0x60200001, 0x49210001, 0x48220001, 2262 0x47230001, 0x46240001, 0x45250001, 0x44260001, 0x43270001, 2263 0x42280001, 0x41290001, 0x402a0001, 0x262b0001, 0x252c0001, 2264 0x242d0001, 0x232e0001, 0x222f0001, 0x21300001, 0x20310001, 2265 0x06320001, 0x05330001, 0x04340001, 0x03350001, 0x02360001, 2266 0x01370001, 0x00380001, 0x00390001, 0x003a0001, 0x003b0001, 2267 0x003c0001, 0x003d0001, 0x003e0001, 0x003f0001, 0x7b400001, 2268 0x7b410001, 0x7b420001, 0x7b430001, 0x7b440001, 0x7b450001, 2269 0x7a460001, 0x79470001, 0x78480001, 0x77490001, 0x764a0001, 2270 0x754b0001, 0x744c0001, 0x734d0001, 0x724e0001, 0x714f0001, 2271 0x70500001, 0x6f510001, 0x6e520001, 0x6d530001, 0x6c540001, 2272 0x6b550001, 0x6a560001, 0x69570001, 0x68580001, 0x67590001, 2273 0x665a0001, 0x655b0001, 0x645c0001, 0x635d0001, 0x625e0001, 2274 0x615f0001, 0x60600001, 0x49610001, 0x48620001, 0x47630001, 2275 0x46640001, 0x45650001, 0x44660001, 0x43670001, 0x42680001, 2276 0x41690001, 0x406a0001, 0x266b0001, 0x256c0001, 0x246d0001, 2277 0x236e0001, 0x226f0001, 0x21700001, 0x20710001, 0x06720001, 2278 0x05730001, 0x04740001, 0x03750001, 0x02760001, 0x01770001, 2279 0x00780001, 0x00790001, 0x007a0001, 0x007b0001, 0x007c0001, 2280 0x007d0001, 0x007e0001, 0x007f0001, 0x3800001e, 0x3801001e, 2281 0x3802001e, 0x3803001e, 0x3804001e, 0x3805001e, 0x3806001e, 2282 0x3807001e, 0x3808001e, 0x3c09001e, 0x3e0a001e, 0x400b001e, 2283 0x440c001e, 0x480d001e, 0x4c0e001e, 0x500f001e, 0x5210001e, 2284 0x5611001e, 0x5a12001e, 0x5e13001e, 0x6014001e, 0x6015001e, 2285 0x6016001e, 0x6217001e, 0x6218001e, 0x6219001e, 0x621a001e, 2286 0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e 2287 }; 2288 2289 static const struct r92c_bb_prog rtl8188ce_bb_prog = { 2290 nitems(rtl8192ce_bb_regs), 2291 rtl8192ce_bb_regs, 2292 rtl8188ce_bb_vals, 2293 nitems(rtl8188ce_agc_vals), 2294 rtl8188ce_agc_vals 2295 }; 2296 2297 static const uint32_t rtl8188cu_bb_vals[] = { 2298 0x0011800d, 0x00ffdb83, 0x80040000, 0x00000001, 0x0000fc00, 2299 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000, 2300 0x01000100, 0x00390004, 0x00000000, 0x00000000, 0x00000000, 2301 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000, 2302 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x569a569a, 2303 0x001b25a4, 0x66e60230, 0x061f0130, 0x00000000, 0x32323200, 2304 0x07000700, 0x22004000, 0x00000808, 0x00000000, 0xc0083070, 2305 0x000004d5, 0x00000000, 0xccc000c0, 0x00000800, 0xfffffffe, 2306 0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000, 2307 0x81121111, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f, 2308 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000, 2309 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 2310 0x48071d40, 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x08800000, 2311 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 2312 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 2313 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 2314 0x6954341e, 0x43bc0094, 0x6954341e, 0x433c0094, 0x00000000, 2315 0x5116848b, 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db, 2316 0x0000001f, 0x00b91612, 0x40000100, 0x20f60000, 0x40000100, 2317 0x20200000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 2318 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 2319 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 2320 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 2321 0x00766932, 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 2322 0x00080740, 0x00020401, 0x0000907f, 0x20010201, 0xa0633333, 2323 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 2324 0x00000000, 0x00027293, 0x00000000, 0x00000000, 0x00000000, 2325 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 2326 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 2327 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 2328 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 2329 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 2330 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 2331 0x02140102, 0x28160d05, 0x00000008, 0x001b25a4, 0x631b25a0, 2332 0x631b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 2333 0x631b25a0, 0x081b25a0, 0x631b25a0, 0x631b25a0, 0x631b25a0, 2334 0x631b25a0, 0x001b25a0, 0x001b25a0, 0x6b1b25a0, 0x00000003, 2335 0x00000000, 0x00000300 2336 }; 2337 2338 static const struct r92c_bb_prog rtl8188cu_bb_prog = { 2339 nitems(rtl8192ce_bb_regs), 2340 rtl8192ce_bb_regs, 2341 rtl8188cu_bb_vals, 2342 nitems(rtl8188ce_agc_vals), 2343 rtl8188ce_agc_vals 2344 }; 2345 2346 /* 2347 * RTL8188EU. 2348 */ 2349 static const uint16_t rtl8188eu_bb_regs[] = { 2350 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818, 0x81c, 0x820, 2351 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c, 0x840, 0x844, 2352 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 0x860, 0x864, 0x868, 2353 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x880, 0x884, 0x888, 0x88c, 2354 0x890, 0x894, 0x898, 0x89c, 0x900, 0x904, 0x908, 0x90c, 0x910, 2355 0x914, 0xa00, 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 0xa1c, 2356 0xa20, 0xa24, 0xa28, 0xa2c, 0xa70, 0xa74, 0xa78, 0xa7c, 0xa80, 2357 0xb2c, 0xc00, 0xc04, 0xc08, 0xc0c, 0xc10, 0xc14, 0xc18, 0xc1c, 2358 0xc20, 0xc24, 0xc28, 0xc2c, 0xc30, 0xc34, 0xc38, 0xc3c, 0xc40, 2359 0xc44, 0xc48, 0xc4c, 0xc50, 0xc54, 0xc58, 0xc5c, 0xc60, 0xc64, 2360 0xc68, 0xc6c, 0xc70, 0xc74, 0xc78, 0xc7c, 0xc80, 0xc84, 0xc88, 2361 0xc8c, 0xc90, 0xc94, 0xc98, 0xc9c, 0xca0, 0xca4, 0xca8, 0xcac, 2362 0xcb0, 0xcb4, 0xcb8, 0xcbc, 0xcc0, 0xcc4, 0xcc8, 0xccc, 0xcd0, 2363 0xcd4, 0xcd8, 0xcdc, 0xce0, 0xce4, 0xce8, 0xcec, 0xd00, 0xd04, 2364 0xd08, 0xd0c, 0xd10, 0xd14, 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38, 2365 0xd3c, 0xd40, 0xd44, 0xd48, 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c, 2366 0xd60, 0xd64, 0xd68, 0xd6c, 0xd70, 0xd74, 0xd78, 0xe00, 0xe04, 2367 0xe08, 0xe10, 0xe14, 0xe18, 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38, 2368 0xe3c, 0xe40, 0xe44, 0xe48, 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c, 2369 0xe60, 0xe68, 0xe6c, 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84, 2370 0xe88, 0xe8c, 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, 0xee8, 0xeec, 2371 0xf14, 0xf4c, 0xf00 2372 }; 2373 2374 static const uint32_t rtl8188eu_bb_vals[] = { 2375 0x80040000, 0x00000003, 0x0000fc00, 0x0000000a, 0x10001331, 2376 0x020c3d10, 0x02200385, 0x00000000, 0x01000100, 0x00390204, 2377 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2378 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000, 2379 0x00000000, 0x00000000, 0x569a11a9, 0x01000014, 0x66f60110, 2380 0x061f0649, 0x00000000, 0x27272700, 0x07000760, 0x25004000, 2381 0x00000808, 0x00000000, 0xb0000c1c, 0x00000001, 0x00000000, 2382 0xccc000c0, 0x00000800, 0xfffffffe, 0x40302010, 0x00706050, 2383 0x00000000, 0x00000023, 0x00000000, 0x81121111, 0x00000002, 2384 0x00000201, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e7f120f, 2385 0x9500bb78, 0x1114d028, 0x00881117, 0x89140f00, 0x1a1b0000, 2386 0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007, 2387 0x00000900, 0x225b0606, 0x218075b1, 0x80000000, 0x48071d40, 2388 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x08800000, 0x40000100, 2389 0x08800000, 0x40000100, 0x00000000, 0x00000000, 0x00000000, 2390 0x00000000, 0x69e9ac47, 0x469652af, 0x49795994, 0x0a97971c, 2391 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 0x69553420, 2392 0x43bc0094, 0x00013169, 0x00250492, 0x00000000, 0x7112848b, 2393 0x47c00bff, 0x00000036, 0x2c7f000d, 0x020610db, 0x0000001f, 2394 0x00b91612, 0x390000e4, 0x20f60000, 0x40000100, 0x20200000, 2395 0x00091521, 0x00000000, 0x00121820, 0x00007f7f, 0x00000000, 2396 0x000300a0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2397 0x00000000, 0x28000000, 0x00000000, 0x00000000, 0x00000000, 2398 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 0x00766932, 2399 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 0x00000740, 2400 0x00020401, 0x0000907f, 0x20010201, 0xa0633333, 0x3333bc43, 2401 0x7a8f5b6f, 0xcc979975, 0x00000000, 0x80608000, 0x00000000, 2402 0x00127353, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2403 0x6437140a, 0x00000000, 0x00000282, 0x30032064, 0x4653de68, 2404 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 0x322c2220, 2405 0x000e3c24, 0x2d2d2d2d, 0x2d2d2d2d, 0x0390272d, 0x2d2d2d2d, 2406 0x2d2d2d2d, 0x2d2d2d2d, 0x2d2d2d2d, 0x00000000, 0x1000dc1f, 2407 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 0x01004800, 2408 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 0x02140102, 2409 0x28160d05, 0x00000008, 0x001b25a4, 0x00c00014, 0x00c00014, 2410 0x01000014, 0x01000014, 0x01000014, 0x01000014, 0x00c00014, 2411 0x01000014, 0x00c00014, 0x00c00014, 0x00c00014, 0x00c00014, 2412 0x00000014, 0x00000014, 0x21555448, 0x01c00014, 0x00000003, 2413 0x00000000, 0x00000300 2414 }; 2415 2416 static const uint32_t rtl8188eu_agc_vals[] = { 2417 0xfb000001, 0xfb010001, 0xfb020001, 0xfb030001, 0xfb040001, 2418 0xfb050001, 0xfa060001, 0xf9070001, 0xf8080001, 0xf7090001, 2419 0xf60a0001, 0xf50b0001, 0xf40c0001, 0xf30d0001, 0xf20e0001, 2420 0xf10f0001, 0xf0100001, 0xef110001, 0xee120001, 0xed130001, 2421 0xec140001, 0xeb150001, 0xea160001, 0xe9170001, 0xe8180001, 2422 0xe7190001, 0xe61a0001, 0xe51b0001, 0xe41c0001, 0xe31d0001, 2423 0xe21e0001, 0xe11f0001, 0x8a200001, 0x89210001, 0x88220001, 2424 0x87230001, 0x86240001, 0x85250001, 0x84260001, 0x83270001, 2425 0x82280001, 0x6b290001, 0x6a2a0001, 0x692b0001, 0x682c0001, 2426 0x672d0001, 0x662e0001, 0x652f0001, 0x64300001, 0x63310001, 2427 0x62320001, 0x61330001, 0x46340001, 0x45350001, 0x44360001, 2428 0x43370001, 0x42380001, 0x41390001, 0x403a0001, 0x403b0001, 2429 0x403c0001, 0x403d0001, 0x403e0001, 0x403f0001, 0xfb400001, 2430 0xfb410001, 0xfb420001, 0xfb430001, 0xfb440001, 0xfb450001, 2431 0xfb460001, 0xfb470001, 0xfb480001, 0xfa490001, 0xf94a0001, 2432 0xf84b0001, 0xf74c0001, 0xf64d0001, 0xf54e0001, 0xf44f0001, 2433 0xf3500001, 0xf2510001, 0xf1520001, 0xf0530001, 0xef540001, 2434 0xee550001, 0xed560001, 0xec570001, 0xeb580001, 0xea590001, 2435 0xe95a0001, 0xe85b0001, 0xe75c0001, 0xe65d0001, 0xe55e0001, 2436 0xe45f0001, 0xe3600001, 0xe2610001, 0xc3620001, 0xc2630001, 2437 0xc1640001, 0x8b650001, 0x8a660001, 0x89670001, 0x88680001, 2438 0x87690001, 0x866a0001, 0x856b0001, 0x846c0001, 0x676d0001, 2439 0x666e0001, 0x656f0001, 0x64700001, 0x63710001, 0x62720001, 2440 0x61730001, 0x60740001, 0x46750001, 0x45760001, 0x44770001, 2441 0x43780001, 0x42790001, 0x417a0001, 0x407b0001, 0x407c0001, 2442 0x407d0001, 0x407e0001, 0x407f0001 2443 }; 2444 2445 static const struct r92c_bb_prog rtl8188eu_bb_prog = { 2446 nitems(rtl8188eu_bb_regs), 2447 rtl8188eu_bb_regs, 2448 rtl8188eu_bb_vals, 2449 nitems(rtl8188eu_agc_vals), 2450 rtl8188eu_agc_vals 2451 }; 2452 2453 /* 2454 * RTL8188FTV. 2455 */ 2456 static const uint16_t rtl8188ftv_bb_regs[] = { 2457 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818, 0x81c, 0x820, 2458 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c, 0x840, 0x844, 2459 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 0x860, 0x864, 0x868, 2460 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x880, 0x884, 0x888, 0x88c, 2461 0x890, 0x894, 0x898, 0x89c, 0x900, 0x904, 0x908, 0x90c, 0x910, 2462 0x914, 0x948, 0x94c, 0x950, 0x954, 0x958, 0x95c, 0x96c, 0xa00, 2463 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 0xa1c, 0xa20, 0xa24, 2464 0xa28, 0xa2c, 0xa70, 0xa74, 0xa78, 0xa7c, 0xa80, 0xa84, 0xa88, 2465 0xa8c, 0xa90, 0xa94, 0xa98, 0xa9c, 0xaa0, 0xb2c, 0xc00, 0xc04, 2466 0xc08, 0xc0c, 0xc10, 0xc14, 0xc18, 0xc1c, 0xc20, 0xc24, 0xc28, 2467 0xc2c, 0xc30, 0xc34, 0xc38, 0xc3c, 0xc40, 0xc44, 0xc48, 0xc4c, 2468 0xc50, 0xc54, 0xc58, 0xc5c, 0xc60, 0xc64, 0xc68, 0xc6c, 0xc70, 2469 0xc74, 0xc78, 0xc7c, 0xc80, 0xc84, 0xc88, 0xc8c, 0xc90, 0xc94, 2470 0xc98, 0xc9c, 0xca0, 0xca4, 0xca8, 0xcac, 0xcb0, 0xcb4, 0xcb8, 2471 0xcbc, 0xcc0, 0xcc4, 0xcc8, 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc, 2472 0xce0, 0xce4, 0xce8, 0xcec, 0xd00, 0xd04, 0xd08, 0xd0c, 0xd10, 2473 0xd14, 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38, 0xd3c, 0xd40, 0xd44, 2474 0xd48, 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c, 0xd60, 0xd64, 0xd68, 2475 0xd6c, 0xd70, 0xd74, 0xd78, 0xe00, 0xe04, 0xe08, 0xe10, 0xe14, 2476 0xe18, 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 2477 0xe48, 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c, 0xe60, 0xe60, 0xe64, 2478 0xe6c, 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 2479 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, 0xeec, 0xf14, 0xf4c, 0xf00 2480 }; 2481 2482 static const uint32_t rtl8188ftv_bb_vals[] = { 2483 0x80045700, 0x00000001, 0x0000fc00, 0x0000000a, 0x10001331, 2484 0x020c3d10, 0x00200385, 0x00000000, 0x01000100, 0x00390204, 2485 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2486 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000, 2487 0x00030000, 0x00000000, 0x569a569a, 0x569a569a, 0x00000130, 2488 0x00000000, 0x00000000, 0x27272700, 0x00000000, 0x25004000, 2489 0x00000808, 0x004f0201, 0xb0000b1e, 0x00000007, 0x00000000, 2490 0xccc000c0, 0x00000800, 0xfffffffe, 0x40302010, 0x00706050, 2491 0x00000000, 0x00000023, 0x00000000, 0x81121111, 0x00000002, 2492 0x00000201, 0x99000000, 0x00000010, 0x20003000, 0x4a880000, 2493 0x4bc5d87a, 0x04eb9b79, 0x00000003, 0x00d047c8, 0x80ff800c, 2494 0x8c898300, 0x2e7f120f, 0x9500bb78, 0x1114d028, 0x00881117, 2495 0x89140f00, 0xd1d80000, 0x5a7da0bd, 0x0000223b, 0x00d30000, 2496 0x101fbf00, 0x00000007, 0x00000900, 0x225b0606, 0x218075b1, 2497 0x00120000, 0x040c0000, 0x12345678, 0xabcdef00, 0x001b1b89, 2498 0x05100000, 0x3f000000, 0x00000000, 0x00000000, 0x48071d40, 2499 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x18800000, 0x40000100, 2500 0x08800000, 0x40000100, 0x00000000, 0x00000000, 0x00000000, 2501 0x00000000, 0x69e9cc4a, 0x31000040, 0x21688080, 0x00001714, 2502 0x1f78403f, 0x00010036, 0xec020107, 0x007f037f, 0x69553420, 2503 0x43bc0094, 0x00013169, 0x00250492, 0x00000000, 0x7112848b, 2504 0x47c07bff, 0x00000036, 0x2c7f000d, 0x020600db, 0x0000001f, 2505 0x00b91612, 0x390000e4, 0x11f60000, 0x40000100, 0x20200000, 2506 0x00091521, 0x00000000, 0x00121820, 0x00007f7f, 0x00000000, 2507 0x000300a0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2508 0x00000000, 0x28000000, 0x00000000, 0x00000000, 0x00000000, 2509 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 0x00766932, 2510 0x00222222, 0x10000000, 0x37644302, 0x2f97d40c, 0x04030740, 2511 0x40020401, 0x0000907f, 0x20010201, 0xa0633333, 0x3333bc53, 2512 0x7a8f5b6f, 0xcb979975, 0x00000000, 0x80608000, 0x98000000, 2513 0x40127353, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2514 0x6437140a, 0x00000000, 0x00000282, 0x30032064, 0x4653de68, 2515 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 0x322c2220, 2516 0x000e3c24, 0x2d2d2d2d, 0x2d2d2d2d, 0x0390272d, 0x2d2d2d2d, 2517 0x2d2d2d2d, 0x2d2d2d2d, 0x2d2d2d2d, 0x00000000, 0x1000dc1f, 2518 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 0x01004800, 2519 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 0x02140102, 2520 0x28160d05, 0x00000008, 0x021400a0, 0x281600a0, 0x01c00010, 2521 0x01c00010, 0x02000010, 0x02000010, 0x02000010, 0x02000010, 2522 0x01c00010, 0x02000010, 0x01c00010, 0x01c00010, 0x01c00010, 2523 0x01c00010, 0x00000010, 0x00000010, 0x03c00010, 0x00000003, 2524 0x00000000, 0x00000300 2525 }; 2526 2527 static const uint32_t rtl8188ftv_agc_vals[] = { 2528 0xfc000001, 0xfb010001, 0xfa020001, 0xf9030001, 0xf8040001, 2529 0xf7050001, 0xf6060001, 0xf5070001, 0xf4080001, 0xf3090001, 2530 0xf20a0001, 0xf10b0001, 0xf00c0001, 0xef0d0001, 0xee0e0001, 2531 0xed0f0001, 0xec100001, 0xeb110001, 0xea120001, 0xe9130001, 2532 0xe8140001, 0xe7150001, 0xe6160001, 0xe5170001, 0xe4180001, 2533 0xe3190001, 0xe21a0001, 0xe11b0001, 0xe01c0001, 0xc21d0001, 2534 0xc11e0001, 0xc01f0001, 0xa5200001, 0xa4210001, 0xa3220001, 2535 0xa2230001, 0xa1240001, 0xa0250001, 0x65260001, 0x64270001, 2536 0x63280001, 0x62290001, 0x612a0001, 0x442b0001, 0x432c0001, 2537 0x422d0001, 0x412e0001, 0x402f0001, 0x21300001, 0x20310001, 2538 0x05320001, 0x04330001, 0x03340001, 0x02350001, 0x01360001, 2539 0x00370001, 0x00380001, 0x00390001, 0x003a0001, 0x003b0001, 2540 0x003c0001, 0x003d0001, 0x003e0001, 0x003f0001 2541 }; 2542 2543 static const struct r92c_bb_prog rtl8188ftv_bb_prog = { 2544 nitems(rtl8188ftv_bb_regs), 2545 rtl8188ftv_bb_regs, 2546 rtl8188ftv_bb_vals, 2547 nitems(rtl8188ftv_agc_vals), 2548 rtl8188ftv_agc_vals 2549 }; 2550 2551 /* 2552 * RTL8188RU. 2553 */ 2554 static const uint16_t rtl8188ru_bb_regs[] = { 2555 0x024, 0x028, 0x040, 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 2556 0x818, 0x81c, 0x820, 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 2557 0x83c, 0x840, 0x844, 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 2558 0x860, 0x864, 0x868, 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x880, 2559 0x884, 0x888, 0x88c, 0x890, 0x894, 0x898, 0x89c, 0x900, 0x904, 2560 0x908, 0x90c, 0xa00, 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 2561 0xa1c, 0xa20, 0xa24, 0xa28, 0xa2c, 0xa70, 0xa74, 0xc00, 0xc04, 2562 0xc08, 0xc0c, 0xc10, 0xc14, 0xc18, 0xc1c, 0xc20, 0xc24, 0xc28, 2563 0xc2c, 0xc30, 0xc34, 0xc38, 0xc3c, 0xc40, 0xc44, 0xc48, 0xc4c, 2564 0xc50, 0xc54, 0xc58, 0xc5c, 0xc60, 0xc64, 0xc68, 0xc6c, 0xc70, 2565 0xc74, 0xc78, 0xc7c, 0xc80, 0xc84, 0xc88, 0xc8c, 0xc90, 0xc94, 2566 0xc98, 0xc9c, 0xca0, 0xca4, 0xca8, 0xcac, 0xcb0, 0xcb4, 0xcb8, 2567 0xcbc, 0xcc0, 0xcc4, 0xcc8, 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc, 2568 0xce0, 0xce4, 0xce8, 0xcec, 0xd00, 0xd04, 0xd08, 0xd0c, 0xd10, 2569 0xd14, 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38, 0xd3c, 0xd40, 0xd44, 2570 0xd48, 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c, 0xd60, 0xd64, 0xd68, 2571 0xd6c, 0xd70, 0xd74, 0xd78, 0xe00, 0xe04, 0xe08, 0xe10, 0xe14, 2572 0xe18, 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 2573 0xe48, 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c, 0xe60, 0xe68, 0xe6c, 2574 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 0xed0, 2575 0xed4, 0xed8, 0xedc, 0xee0, 0xeec, 0xee8, 0xf14, 0xf4c, 0xf00 2576 }; 2577 2578 static const uint32_t rtl8188ru_bb_vals[] = { 2579 0x0011800d, 0x00ffdb83, 0x000c0004, 0x80040000, 0x00000001, 2580 0x0000fc00, 0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 2581 0x00000000, 0x01000100, 0x00390204, 0x00000000, 0x00000000, 2582 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 2583 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2584 0x569a569a, 0x001b25a4, 0x66e60230, 0x061f0130, 0x00000000, 2585 0x32323200, 0x03000300, 0x22004000, 0x00000808, 0x00ffc3f1, 2586 0xc0083070, 0x000004d5, 0x00000000, 0xccc000c0, 0x00000800, 2587 0xfffffffe, 0x40302010, 0x00706050, 0x00000000, 0x00000023, 2588 0x00000000, 0x81121111, 0x00d047c8, 0x80ff000c, 0x8c838300, 2589 0x2e68120f, 0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 2590 0x15160000, 0x070b0f12, 0x00000104, 0x00d30000, 0x101fbf00, 2591 0x00000007, 0x48071d40, 0x03a05611, 0x000000e4, 0x6c6c6c6c, 2592 0x08800000, 0x40000100, 0x08800000, 0x40000100, 0x00000000, 2593 0x00000000, 0x00000000, 0x00000000, 0x69e9ac44, 0x469652cf, 2594 0x49795994, 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 2595 0x007f037f, 0x6954342e, 0x43bc0094, 0x6954342f, 0x433c0094, 2596 0x00000000, 0x5116848b, 0x47c00bff, 0x00000036, 0x2c56000d, 2597 0x018610db, 0x0000001f, 0x00b91612, 0x24000090, 0x20f60000, 2598 0x24000090, 0x20200000, 0x00121820, 0x00000000, 0x00121820, 2599 0x00007f7f, 0x00000000, 0x00000080, 0x00000000, 0x00000000, 2600 0x00000000, 0x00000000, 0x00000000, 0x28000000, 0x00000000, 2601 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2602 0x64b22427, 0x00766932, 0x00222222, 0x00000000, 0x37644302, 2603 0x2f97d40c, 0x00080740, 0x00020401, 0x0000907f, 0x20010201, 2604 0xa0633333, 0x3333bc43, 0x7a8f5b6b, 0xcc979975, 0x00000000, 2605 0x80608000, 0x00000000, 0x00027293, 0x00000000, 0x00000000, 2606 0x00000000, 0x00000000, 0x6437140a, 0x00000000, 0x00000000, 2607 0x30032064, 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 2608 0x1812362e, 0x322c2220, 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 2609 0x03902a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 2610 0x00000000, 0x1000dc1f, 0x10008c1f, 0x02140102, 0x681604c2, 2611 0x01007c00, 0x01004800, 0xfb000000, 0x000028d1, 0x1000dc1f, 2612 0x10008c1f, 0x02140102, 0x28160d05, 0x00000010, 0x001b25a4, 2613 0x631b25a0, 0x631b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 2614 0x081b25a0, 0x631b25a0, 0x081b25a0, 0x631b25a0, 0x631b25a0, 2615 0x631b25a0, 0x631b25a0, 0x001b25a0, 0x001b25a0, 0x6b1b25a0, 2616 0x31555448, 0x00000003, 0x00000000, 0x00000300 2617 }; 2618 2619 static const uint32_t rtl8188ru_agc_vals[] = { 2620 0x7b000001, 0x7b010001, 0x7b020001, 0x7b030001, 0x7b040001, 2621 0x7b050001, 0x7b060001, 0x7b070001, 0x7b080001, 0x7a090001, 2622 0x790a0001, 0x780b0001, 0x770c0001, 0x760d0001, 0x750e0001, 2623 0x740f0001, 0x73100001, 0x72110001, 0x71120001, 0x70130001, 2624 0x6f140001, 0x6e150001, 0x6d160001, 0x6c170001, 0x6b180001, 2625 0x6a190001, 0x691a0001, 0x681b0001, 0x671c0001, 0x661d0001, 2626 0x651e0001, 0x641f0001, 0x63200001, 0x62210001, 0x61220001, 2627 0x60230001, 0x46240001, 0x45250001, 0x44260001, 0x43270001, 2628 0x42280001, 0x41290001, 0x402a0001, 0x262b0001, 0x252c0001, 2629 0x242d0001, 0x232e0001, 0x222f0001, 0x21300001, 0x20310001, 2630 0x06320001, 0x05330001, 0x04340001, 0x03350001, 0x02360001, 2631 0x01370001, 0x00380001, 0x00390001, 0x003a0001, 0x003b0001, 2632 0x003c0001, 0x003d0001, 0x003e0001, 0x003f0001, 0x7b400001, 2633 0x7b410001, 0x7b420001, 0x7b430001, 0x7b440001, 0x7b450001, 2634 0x7b460001, 0x7b470001, 0x7b480001, 0x7a490001, 0x794a0001, 2635 0x784b0001, 0x774c0001, 0x764d0001, 0x754e0001, 0x744f0001, 2636 0x73500001, 0x72510001, 0x71520001, 0x70530001, 0x6f540001, 2637 0x6e550001, 0x6d560001, 0x6c570001, 0x6b580001, 0x6a590001, 2638 0x695a0001, 0x685b0001, 0x675c0001, 0x665d0001, 0x655e0001, 2639 0x645f0001, 0x63600001, 0x62610001, 0x61620001, 0x60630001, 2640 0x46640001, 0x45650001, 0x44660001, 0x43670001, 0x42680001, 2641 0x41690001, 0x406a0001, 0x266b0001, 0x256c0001, 0x246d0001, 2642 0x236e0001, 0x226f0001, 0x21700001, 0x20710001, 0x06720001, 2643 0x05730001, 0x04740001, 0x03750001, 0x02760001, 0x01770001, 2644 0x00780001, 0x00790001, 0x007a0001, 0x007b0001, 0x007c0001, 2645 0x007d0001, 0x007e0001, 0x007f0001, 0x3800001e, 0x3801001e, 2646 0x3802001e, 0x3803001e, 0x3804001e, 0x3805001e, 0x3806001e, 2647 0x3807001e, 0x3808001e, 0x3c09001e, 0x3e0a001e, 0x400b001e, 2648 0x440c001e, 0x480d001e, 0x4c0e001e, 0x500f001e, 0x5210001e, 2649 0x5611001e, 0x5a12001e, 0x5e13001e, 0x6014001e, 0x6015001e, 2650 0x6016001e, 0x6217001e, 0x6218001e, 0x6219001e, 0x621a001e, 2651 0x621b001e, 0x621c001e, 0x621d001e, 0x621e001e, 0x621f001e 2652 }; 2653 2654 static const struct r92c_bb_prog rtl8188ru_bb_prog = { 2655 nitems(rtl8188ru_bb_regs), 2656 rtl8188ru_bb_regs, 2657 rtl8188ru_bb_vals, 2658 nitems(rtl8188ru_agc_vals), 2659 rtl8188ru_agc_vals 2660 }; 2661 2662 /* 2663 * RTL8723AE and RTL8723AU. 2664 */ 2665 2666 static const uint16_t rtl8723a_bb_regs[] = { 2667 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818, 0x81c, 0x820, 2668 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c, 0x840, 0x844, 2669 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 0x860, 0x864, 0x868, 2670 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x880, 0x884, 0x888, 0x88c, 2671 0x890, 0x894, 0x898, 0x89c, 0x900, 0x904, 0x908, 0x90c, 0xa00, 2672 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 0xa1c, 0xa20, 0xa24, 2673 0xa28, 0xa2c, 0xa70, 0xa74, 0xa78, 0xc00, 0xc04, 0xc08, 0xc0c, 2674 0xc10, 0xc14, 0xc18, 0xc1c, 0xc20, 0xc24, 0xc28, 0xc2c, 0xc30, 2675 0xc34, 0xc38, 0xc3c, 0xc40, 0xc44, 0xc48, 0xc4c, 0xc50, 0xc54, 2676 0xc58, 0xc5c, 0xc60, 0xc64, 0xc68, 0xc6c, 0xc70, 0xc74, 0xc78, 2677 0xc7c, 0xc80, 0xc84, 0xc88, 0xc8c, 0xc90, 0xc94, 0xc98, 0xc9c, 2678 0xca0, 0xca4, 0xca8, 0xcac, 0xcb0, 0xcb4, 0xcb8, 0xcbc, 0xcc0, 2679 0xcc4, 0xcc8, 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc, 0xce0, 0xce4, 2680 0xce8, 0xcec, 0xd00, 0xd04, 0xd08, 0xd0c, 0xd10, 0xd14, 0xd18, 2681 0xd2c, 0xd30, 0xd34, 0xd38, 0xd3c, 0xd40, 0xd44, 0xd48, 0xd4c, 2682 0xd50, 0xd54, 0xd58, 0xd5c, 0xd60, 0xd64, 0xd68, 0xd6c, 0xd70, 2683 0xd74, 0xd78, 0xe00, 0xe04, 0xe08, 0xe10, 0xe14, 0xe18, 0xe1c, 2684 0xe28, 0xe30, 0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 0xe48, 0xe4c, 2685 0xe50, 0xe54, 0xe58, 0xe5c, 0xe60, 0xe68, 0xe6c, 0xe70, 0xe74, 2686 0xe78, 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 0xed0, 0xed4, 0xed8, 2687 0xedc, 0xee0, 0xeec, 0xf14, 0xf4c, 0xf00 2688 }; 2689 2690 static const uint32_t rtl8723a_bb_vals[] = { 2691 0x80040000, 0x00000003, 0x0000fc00, 0x0000000a, 0x10005388, 2692 0x020c3d10, 0x02200385, 0x00000000, 0x01000100, 0x00390004, 2693 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2694 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000, 2695 0x00000000, 0x00000000, 0x569a569a, 0x001b25a4, 0x66f60110, 2696 0x061f0130, 0x00000000, 0x32323200, 0x07000760, 0x22004000, 2697 0x00000808, 0x00000000, 0xc0083070, 0x000004d5, 0x00000000, 2698 0xccc000c0, 0x00000800, 0xfffffffe, 0x40302010, 0x00706050, 2699 0x00000000, 0x00000023, 0x00000000, 0x81121111, 0x00d047c8, 2700 0x80ff000c, 0x8c838300, 0x2e68120f, 0x9500bb78, 0x11144028, 2701 0x00881117, 0x89140f00, 0x1a1b0000, 0x090e1317, 0x00000204, 2702 0x00d30000, 0x101fbf00, 0x00000007, 0x00000900, 0x48071d40, 2703 0x03a05611, 0x000000e4, 0x6c6c6c6c, 0x08800000, 0x40000100, 2704 0x08800000, 0x40000100, 0x00000000, 0x00000000, 0x00000000, 2705 0x00000000, 0x69e9ac44, 0x469652cf, 0x49795994, 0x0a97971c, 2706 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 0x69543420, 2707 0x43bc0094, 0x69543420, 0x433c0094, 0x00000000, 0x7116848b, 2708 0x47c00bff, 0x00000036, 0x2c7f000d, 0x018610db, 0x0000001f, 2709 0x00b91612, 0x40000100, 0x20f60000, 0x40000100, 0x20200000, 2710 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 0x00000000, 2711 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2712 0x00000000, 0x28000000, 0x00000000, 0x00000000, 0x00000000, 2713 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 0x00766932, 2714 0x00222222, 0x00000000, 0x37644302, 0x2f97d40c, 0x00080740, 2715 0x00020401, 0x0000907f, 0x20010201, 0xa0633333, 0x3333bc43, 2716 0x7a8f5b6b, 0xcc979975, 0x00000000, 0x80608000, 0x00000000, 2717 0x00027293, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2718 0x6437140a, 0x00000000, 0x00000000, 0x30032064, 0x4653de68, 2719 0x04518a3c, 0x00002101, 0x2a201c16, 0x1812362e, 0x322c2220, 2720 0x000e3c24, 0x2a2a2a2a, 0x2a2a2a2a, 0x03902a2a, 0x2a2a2a2a, 2721 0x2a2a2a2a, 0x2a2a2a2a, 0x2a2a2a2a, 0x00000000, 0x1000dc1f, 2722 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 0x01004800, 2723 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 0x02140102, 2724 0x28160d05, 0x00000008, 0x001b25a4, 0x631b25a0, 0x631b25a0, 2725 0x081b25a0, 0x081b25a0, 0x081b25a0, 0x081b25a0, 0x631b25a0, 2726 0x081b25a0, 0x631b25a0, 0x631b25a0, 0x631b25a0, 0x631b25a0, 2727 0x001b25a0, 0x001b25a0, 0x6b1b25a0, 0x00000003, 0x00000000, 2728 0x00000300 2729 }; 2730 2731 static const struct r92c_bb_prog rtl8723a_bb_prog = { 2732 nitems(rtl8723a_bb_regs), 2733 rtl8723a_bb_regs, 2734 rtl8723a_bb_vals, 2735 nitems(rtl8192ce_agc_vals), 2736 rtl8192ce_agc_vals 2737 }; 2738 2739 /* 2740 * RF initialization values. 2741 */ 2742 struct r92c_rf_prog { 2743 int count; 2744 const uint16_t *regs; 2745 const uint32_t *vals; 2746 }; 2747 2748 /* 2749 * RTL8192CU and RTL8192CE-VAU. 2750 */ 2751 static const uint16_t rtl8192ce_rf1_regs[] = { 2752 0x00, 0x01, 0x02, 0x03, 0x04, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 2753 0x0f, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22, 2754 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2a, 0x2b, 2755 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 2756 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 2757 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 2758 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 2759 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 2760 0x2c, 0x2a, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 2761 0x11, 0x10, 0x11, 0x10, 0x11, 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 2762 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x14, 0x14, 2763 0x14, 0x14, 0x15, 0x15, 0x15, 0x15, 0x16, 0x16, 0x16, 0x16, 0x00, 2764 0x18, 0xfe, 0xfe, 0x1f, 0xfe, 0xfe, 0x1e, 0x1f, 0x00 2765 }; 2766 2767 static const uint32_t rtl8192ce_rf1_vals[] = { 2768 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1, 2769 0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x00000, 0x10255, 2770 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000, 2771 0x00000, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x577c0, 2772 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 2773 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 2774 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 2775 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 2776 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 2777 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 2778 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 2779 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 2780 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 2781 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 2782 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100, 0x32000, 2783 0x71000, 0xb0000, 0xfc000, 0x287af, 0x244b7, 0x204ab, 0x1c49f, 2784 0x18493, 0x14297, 0x10295, 0x0c298, 0x0819c, 0x040a8, 0x0001c, 2785 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f424, 0x4f424, 0x8f424, 2786 0xcf424, 0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 2787 0x00000, 0x00000, 0x80003, 0x00000, 0x00000, 0x44457, 0x80000, 2788 0x30159 2789 }; 2790 2791 static const uint16_t rtl8192ce_rf2_regs[] = { 2792 0x00, 0x01, 0x02, 0x03, 0x04, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 2793 0x0f, 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 2794 0x13, 0x13, 0x13, 0x13, 0x13, 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 2795 0x15, 0x15, 0x16, 0x16, 0x16, 0x16 2796 }; 2797 2798 static const uint32_t rtl8192ce_rf2_vals[] = { 2799 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1, 2800 0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x32000, 0x71000, 2801 0xb0000, 0xfc000, 0x287af, 0x244b7, 0x204ab, 0x1c49f, 0x18493, 2802 0x14297, 0x10295, 0x0c298, 0x0819c, 0x040a8, 0x0001c, 0x1944c, 2803 0x59444, 0x9944c, 0xd9444, 0x0f424, 0x4f424, 0x8f424, 0xcf424, 2804 0xe0330, 0xa0330, 0x60330, 0x20330 2805 }; 2806 2807 static const struct r92c_rf_prog rtl8192ce_rf_prog[] = { 2808 { 2809 nitems(rtl8192ce_rf1_regs), 2810 rtl8192ce_rf1_regs, 2811 rtl8192ce_rf1_vals 2812 }, 2813 { 2814 nitems(rtl8192ce_rf2_regs), 2815 rtl8192ce_rf2_regs, 2816 rtl8192ce_rf2_vals 2817 } 2818 }; 2819 2820 /* 2821 * RTL8188CE-VAU. 2822 */ 2823 static const uint32_t rtl8188ce_rf_vals[] = { 2824 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1, 2825 0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x00000, 0x10255, 2826 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000, 2827 0x00000, 0x01558, 0x00060, 0x00483, 0x4f200, 0xec7d9, 0x577c0, 2828 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 2829 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 2830 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 2831 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 2832 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 2833 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 2834 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 2835 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 2836 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 2837 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 2838 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100, 0x32000, 2839 0x71000, 0xb0000, 0xfc000, 0x287b3, 0x244b7, 0x204ab, 0x1c49f, 2840 0x18493, 0x1429b, 0x10299, 0x0c29c, 0x081a0, 0x040ac, 0x00020, 2841 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f424, 0x4f424, 0x8f424, 2842 0xcf424, 0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 2843 0x00000, 0x00000, 0x80003, 0x00000, 0x00000, 0x44457, 0x80000, 2844 0x30159 2845 }; 2846 2847 static const struct r92c_rf_prog rtl8188ce_rf_prog[] = { 2848 { 2849 nitems(rtl8192ce_rf1_regs), 2850 rtl8192ce_rf1_regs, 2851 rtl8188ce_rf_vals 2852 } 2853 }; 2854 2855 2856 /* 2857 * RTL8188CU. 2858 */ 2859 static const uint32_t rtl8188cu_rf_vals[] = { 2860 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb1, 2861 0x54867, 0x8992e, 0x0e52c, 0x39ce7, 0x00451, 0x00000, 0x10255, 2862 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000, 2863 0x00000, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x577c0, 2864 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 2865 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 2866 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 2867 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 2868 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 2869 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 2870 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 2871 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 2872 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 2873 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 2874 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100, 0x32000, 2875 0x71000, 0xb0000, 0xfc000, 0x287b3, 0x244b7, 0x204ab, 0x1c49f, 2876 0x18493, 0x1429b, 0x10299, 0x0c29c, 0x081a0, 0x040ac, 0x00020, 2877 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f405, 0x4f405, 0x8f405, 2878 0xcf405, 0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 2879 0x00000, 0x00000, 0x80003, 0x00000, 0x00000, 0x44457, 0x80000, 2880 0x30159 2881 }; 2882 2883 static const struct r92c_rf_prog rtl8188cu_rf_prog[] = { 2884 { 2885 nitems(rtl8192ce_rf1_regs), 2886 rtl8192ce_rf1_regs, 2887 rtl8188cu_rf_vals 2888 } 2889 }; 2890 2891 /* 2892 * RTL8192EE and RTL8192EU. 2893 */ 2894 static const uint16_t rtl8192e_rf_regs[] = { 2895 0x7f, 0x81, 0x00, 0x08, 0x18, 0x19, 0x1b, 0x1e, 0x1f, 0x2f, 0x3f, 2896 0x42, 0x57, 0x58, 0x67, 0x83, 0xb0, 0xb1, 0xb2, 0xb4, 0xb5, 0xb6, 2897 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, 0xc0, 0xc1, 2898 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0x1c, 0xdf, 2899 0xef, 0x51, 0x52, 0x53, 0x56, 0x35, 0x35, 0x35, 0x36, 0x36, 0x36, 2900 0x36, 0x18, 0x5a, 0x19, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 2901 0x34, 0x34, 0x34, 0x34, 0x00, 0x84, 0x86, 0x87, 0x8e, 0x8f, 0xef, 2902 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 2903 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0xef, 0xfe, 0x18, 0xfe, 0xfe, 0xfe, 2904 0xfe, 0x1e, 0x1f, 0x00 2905 }; 2906 2907 static const uint32_t rtl8192e_rf_vals[] = { 2908 0x00082, 0x3fc00, 0x30000, 0x08400, 0x00407, 0x00012, 0x0394c, 2909 0x80009, 0x00880, 0x1a060, 0x00000, 0x060c0, 0xd0000, 0xbe180, 2910 0x01552, 0x00000, 0xff9f1, 0x55418, 0x8cc00, 0x43083, 0x08166, 2911 0x0803e, 0x1c69f, 0x0407f, 0x90001, 0x40001, 0x00400, 0x00078, 2912 0xb3333, 0x33340, 0x00000, 0x05999, 0x09999, 0x02400, 0x00009, 2913 0x40c91, 0x99999, 0x000a3, 0x88820, 0x76c06, 0x00000, 0x80000, 2914 0x00000, 0x00180, 0x001a0, 0x69545, 0x7e45e, 0x00071, 0x51ff3, 2915 0x000a8, 0x001e2, 0x002a8, 0x01c24, 0x09c24, 0x11c24, 0x19c24, 2916 0x00c07, 0x48000, 0x739d0, 0x0add7, 0x09dd4, 0x08dd1, 0x07dce, 2917 0x06dcb, 0x05dc8, 0x04dc5, 0x034cc, 0x0244f, 0x0144c, 0x00014, 2918 0x30159, 0x68180, 0x0014e, 0x49f80, 0x65540, 0x88000, 0x020a0, 2919 0xf02b0, 0xef7b0, 0xd4fb0, 0xcf060, 0xb0090, 0xa0080, 0x90080, 2920 0x8f780, 0x78730, 0x60fb0, 0x5ffa0, 0x40620, 0x37090, 0x20080, 2921 0x1f060, 0x0ffb0, 0x000a0, 0x00000, 0x0fc07, 0x00000, 0x00000, 2922 0x00000, 0x00000, 0x00001, 0x80000, 0x33e70 2923 }; 2924 2925 static const uint16_t rtl8192e_rf2_regs[] = { 2926 0x7f, 0x81, 0x00, 0x08, 0x18, 0x19, 0x1b, 0x1e, 0x1f, 0x2f, 0x3f, 2927 0x42, 0x57, 0x58, 0x67, 0x7f, 0x81, 0x83, 0x1c, 0xdf, 0xef, 0x51, 2928 0x52, 0x53, 0x56, 0x35, 0x35, 0x35, 0x36, 0x36, 0x36, 0x36, 0x18, 2929 0x5a, 0x19, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 2930 0x34, 0x34, 0x00, 0x84, 0x86, 0x87, 0x8e, 0x8f, 0xef, 0x3b, 0x3b, 2931 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 2932 0x3b, 0x3b, 0x3b, 0xef, 0x00, 0xfe, 0xfe, 0xfe, 0xfe, 0x1e, 0x1f, 2933 0x00 2934 }; 2935 2936 static const uint32_t rtl8192e_rf2_vals[] = { 2937 0x00082, 0x3fc00, 0x30000, 0x08400, 0x00407, 0x00012, 0x0394c, 2938 0x80009, 0x00880, 0x1a060, 0x00000, 0x060c0, 0xd0000, 0xbe180, 2939 0x01552, 0x00082, 0x3f000, 0x00000, 0x00000, 0x00180, 0x001a0, 2940 0x69545, 0x7e42e, 0x00071, 0x51ff3, 0x000a8, 0x001e0, 0x002a8, 2941 0x01ca8, 0x09c24, 0x11c24, 0x19c24, 0x00c07, 0x48000, 0x739d0, 2942 0x0add7, 0x09dd4, 0x08dd1, 0x07dce, 0x06dcb, 0x05dc8, 0x04dc5, 2943 0x034cc, 0x0244f, 0x0144c, 0x00014, 0x30159, 0x68180, 0x000ce, 2944 0x49f80, 0x65540, 0x88000, 0x020a0, 0xf02b0, 0xef7b0, 0xd4fb0, 2945 0xcf060, 0xb0090, 0xa0080, 0x90080, 0x8f780, 0x78730, 0x60fb0, 2946 0x5ffa0, 0x40620, 0x37090, 0x20080, 0x1f060, 0x0ffb0, 0x000a0, 2947 0x10159, 0x00000, 0x00000, 0x00000, 0x00000, 0x00001, 0x80000, 2948 0x33e70 2949 }; 2950 2951 static const struct r92c_rf_prog rtl8192e_rf_prog[] = { 2952 { 2953 nitems(rtl8192e_rf_regs), 2954 rtl8192e_rf_regs, 2955 rtl8192e_rf_vals 2956 }, 2957 { 2958 nitems(rtl8192e_rf2_regs), 2959 rtl8192e_rf2_regs, 2960 rtl8192e_rf2_vals 2961 } 2962 }; 2963 2964 /* 2965 * RTL8188EU. 2966 */ 2967 static const uint16_t rtl8188eu_rf_regs[] = { 2968 0x00, 0x08, 0x18, 0x19, 0x1e, 0x1f, 0x2f, 0x3f, 0x42, 0x57, 0x58, 2969 0x67, 0x83, 0xb0, 0xb1, 0xb2, 0xb4, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 2970 0xbb, 0xbf, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 2971 0xdf, 0xef, 0x51, 0x52, 0x53, 0x56, 0x35, 0x35, 0x35, 0x36, 0x36, 2972 0x36, 0x36, 0xb6, 0x18, 0x5a, 0x19, 0x34, 0x34, 0x34, 0x34, 0x34, 2973 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x00, 0x84, 0x86, 0x87, 0x8e, 2974 0x8f, 0xef, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 2975 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0xef, 0x00, 0x18, 0xfe, 2976 0xfe, 0x1f, 0xfe, 0xfe, 0x1e, 0x1f, 0x00 2977 }; 2978 2979 static const uint32_t rtl8188eu_rf_vals[] = { 2980 0x30000, 0x84000, 0x00407, 0x00012, 0x80009, 0x00880, 0x1a060, 2981 0x00000, 0x060c0, 0xd0000, 0xbe180, 0x01552, 0x00000, 0xff8fc, 2982 0x54400, 0xccc19, 0x43003, 0x4953e, 0x1c718, 0x060ff, 0x80001, 2983 0x40000, 0x00400, 0xc0000, 0x02400, 0x00009, 0x40c91, 0x99999, 2984 0x000a3, 0x88820, 0x76c06, 0x00000, 0x80000, 0x00180, 0x001a0, 2985 0x6b27d, 0x7e49d, 0x00073, 0x51ff3, 0x00086, 0x00186, 0x00286, 2986 0x01c25, 0x09c25, 0x11c25, 0x19c25, 0x48538, 0x00c07, 0x4bd00, 2987 0x739d0, 0x0adf3, 0x09df0, 0x08ded, 0x07dea, 0x06de7, 0x054ee, 2988 0x044eb, 0x034e8, 0x0246b, 0x01468, 0x0006d, 0x30159, 0x68200, 2989 0x000ce, 0x48a00, 0x65540, 0x88000, 0x020a0, 0xf02b0, 0xef7b0, 2990 0xd4fb0, 0xcf060, 0xb0090, 0xa0080, 0x90080, 0x8f780, 0x722b0, 2991 0x6f7b0, 0x54fb0, 0x4f060, 0x30090, 0x20080, 0x10080, 0x0f780, 2992 0x000a0, 0x10159, 0x0f407, 0x00000, 0x00000, 0x80003, 0x00000, 2993 0x00000, 0x00001, 0x80000, 0x33e60 2994 }; 2995 2996 static const struct r92c_rf_prog rtl8188eu_rf_prog[] = { 2997 { 2998 nitems(rtl8188eu_rf_regs), 2999 rtl8188eu_rf_regs, 3000 rtl8188eu_rf_vals 3001 } 3002 }; 3003 3004 /* 3005 * RTL8188FTV. 3006 */ 3007 static const uint16_t rtl8188ftv_rf_regs[] = { 3008 0x000, 0x008, 0x018, 0x019, 0x01b, 0x01e, 0x01f, 0x02f, 0x03f, 0x042, 3009 0x057, 0x058, 0x067, 0x083, 0x0b0, 0x0b1, 0x0b2, 0x0b4, 0x0b5, 0x0b6, 3010 0x0b7, 0x0b8, 0x0b9, 0x0ba, 0x0bb, 0x0bf, 0x0c2, 0x0c3, 0x0c4, 0x0c5, 3011 0x0c6, 0x0c7, 0x0c8, 0x0c9, 0x0ca, 0x0df, 0x0ef, 0x051, 0x052, 0x053, 3012 0x056, 0x035, 0x035, 0x035, 0x036, 0x036, 0x036, 0x036, 0x018, 0x05a, 3013 0x019, 0x034, 0x034, 0x034, 0x034, 0x034, 0x034, 0x034, 0x034, 0x034, 3014 0x034, 0x034, 0x000, 0x084, 0x086, 0x087, 0x08e, 0x08f, 0x0ef, 0x03b, 3015 0x03b, 0x03b, 0x03b, 0x03b, 0x03b, 0x03b, 0x03b, 0x03b, 0x03b, 0x03b, 3016 0x03b, 0x03b, 0x03b, 0x03b, 0x03b, 0x0ef, 0x0ef, 0x03b, 0x03b, 0x0ef, 3017 0x0ef, 0x030, 0x031, 0x032, 0x0ef, 0x000, 0x018, 0xffe, 0xffe, 0x01f, 3018 0xffe, 0xffe, 0x01e, 0x01f, 0x000 3019 }; 3020 3021 static const uint32_t rtl8188ftv_rf_vals[] = { 3022 0x30000, 0x08400, 0x00407, 0x00012, 0x01c6c, 0x80009, 0x00880, 3023 0x1a060, 0x28000, 0x060c0, 0xd0000, 0xc0160, 0x01552, 0x00000, 3024 0xff9f0, 0x22218, 0x34c00, 0x4484b, 0x0112a, 0x0053e, 0x10408, 3025 0x10200, 0x80001, 0x40001, 0x00400, 0xc0000, 0x02400, 0x00009, 3026 0x40c91, 0x99999, 0x000a3, 0x8f820, 0x76c06, 0x00000, 0x80000, 3027 0x00180, 0x001a0, 0xe8231, 0xfac2c, 0x00141, 0x517f0, 0x00090, 3028 0x00190, 0x00290, 0x01064, 0x09064, 0x11064, 0x19064, 0x00c07, 3029 0x48000, 0x739d0, 0x0add2, 0x09dd0, 0x08cf3, 0x07cf0, 0x06ced, 3030 0x05cd2, 0x04ccf, 0x03ccc, 0x02cc9, 0x01c4c, 0x00c49, 0x30159, 3031 0x48000, 0x0002a, 0x00025, 0x65540, 0x88000, 0x020a0, 0xf0f00, 3032 0xe0b00, 0xd0900, 0xc0700, 0xb0600, 0xa0400, 0x90200, 0x80000, 3033 0x7bf00, 0x60b00, 0x5c900, 0x40700, 0x30600, 0x2d500, 0x10200, 3034 0x0e000, 0x000a0, 0x00010, 0x0c0a8, 0x10400, 0x00000, 0x80000, 3035 0x10000, 0x0000f, 0x07efe, 0x00000, 0x10159, 0x0fc07, 0x00000, 3036 0x00000, 0x80003, 0x00000, 0x00000, 0x00001, 0x80000, 0x33d95 3037 }; 3038 3039 static const struct r92c_rf_prog rtl8188ftv_rf_prog[] = { 3040 { 3041 nitems(rtl8188ftv_rf_regs), 3042 rtl8188ftv_rf_regs, 3043 rtl8188ftv_rf_vals 3044 } 3045 }; 3046 3047 /* 3048 * RTL8192EE and RTL8192EU. 3049 */ 3050 static const uint16_t rtl8192e_bb_regs[] = { 3051 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818, 0x81c, 0x820, 3052 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c, 0x840, 0x844, 3053 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 0x860, 0x864, 0x868, 3054 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x880, 0x884, 0x888, 0x88c, 3055 0x890, 0x894, 0x898, 0x900, 0x904, 0x908, 0x90c, 0x910, 0x914, 3056 0x918, 0x91c, 0x924, 0x928, 0x92c, 0x930, 0x934, 0x938, 0x93c, 3057 0x940, 0x944, 0x94c, 0xa00, 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 3058 0xa18, 0xa1c, 0xa20, 0xa24, 0xa28, 0xa2c, 0xa70, 0xa74, 0xa78, 3059 0xa7c, 0xa80, 0xb38, 0xc00, 0xc04, 0xc08, 0xc0c, 0xc10, 0xc14, 3060 0xc18, 0xc1c, 0xc20, 0xc24, 0xc28, 0xc2c, 0xc30, 0xc34, 0xc38, 3061 0xc3c, 0xc40, 0xc44, 0xc48, 0xc4c, 0xc50, 0xc54, 0xc58, 0xc5c, 3062 0xc60, 0xc64, 0xc68, 0xc6c, 0xc70, 0xc74, 0xc78, 0xc7c, 0xc80, 3063 0xc84, 0xc88, 0xc8c, 0xc90, 0xc94, 0xc98, 0xc9c, 0xca0, 0xca4, 3064 0xca8, 0xcac, 0xcb0, 0xcb4, 0xcb8, 0xcbc, 0xcc0, 0xcc4, 0xcc8, 3065 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc, 0xce0, 0xce4, 0xce8, 0xcec, 3066 0xd00, 0xd04, 0xd08, 0xd0c, 0xd10, 0xd14, 0xd18, 0xd1c, 0xd2c, 3067 0xd30, 0xd34, 0xd38, 0xd3c, 0xd40, 0xd44, 0xd48, 0xd4c, 0xd50, 3068 0xd54, 0xd58, 0xd5c, 0xd60, 0xd64, 0xd68, 0xd6c, 0xd70, 0xd74, 3069 0xd78, 0xd80, 0xd84, 0xd88, 0xe00, 0xe04, 0xe08, 0xe10, 0xe14, 3070 0xe18, 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38, 0xe3c, 0xe40, 0xe44, 3071 0xe48, 0xe4c, 0xe50, 0xe54, 0xe58, 0xe5c, 0xe60, 0xe68, 0xe6c, 3072 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, 0xed0, 3073 0xed4, 0xed8, 0xedc, 0xee0, 0xeec, 0xee4, 0xee8, 0xf14, 0xf4c, 3074 0xf00 3075 }; 3076 3077 static const uint32_t rtl8192e_bb_vals[] = { 3078 0x80040000, 0x00000003, 0x0000fc00, 0x0000000a, 0x10001331, 3079 0x020c3d10, 0x02220385, 0x00000000, 0x01000100, 0x00390204, 3080 0x01000100, 0x00390204, 0x32323232, 0x30303030, 0x30303030, 3081 0x30303030, 0x00010000, 0x00010000, 0x28282828, 0x28282828, 3082 0x00000000, 0x00000000, 0x009a009a, 0x01000014, 0x66f60000, 3083 0x061f0000, 0x30303030, 0x30303030, 0x00000000, 0x55004200, 3084 0x08080808, 0x00000000, 0xb0000c1c, 0x00000001, 0x00000000, 3085 0xcc0000c0, 0x00000800, 0xfffffffe, 0x40302010, 0x00000000, 3086 0x00000023, 0x00000000, 0x81121313, 0x806c0001, 0x00000001, 3087 0x00000000, 0x00010000, 0x00000001, 0x00000000, 0x00000000, 3088 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 3089 0x00000000, 0x00000008, 0x00d0c7c8, 0x81ff800c, 0x8c838300, 3090 0x2e68120f, 0x95009b78, 0x1114d028, 0x00881117, 0x89140f00, 3091 0x1a1b0000, 0x090e1317, 0x00000204, 0x00d30000, 0x101fff80, 3092 0x00000007, 0x00000900, 0x225b0606, 0x218075b1, 0x00000000, 3093 0x48071d40, 0x03a05633, 0x000000e4, 0x6c6c6c6c, 0x08800000, 3094 0x40000100, 0x08800000, 0x40000100, 0x00000000, 0x00000000, 3095 0x00000000, 0x00000000, 0x69e9ac47, 0x469652af, 0x49795994, 3096 0x0a97971c, 0x1f7c403f, 0x000100b7, 0xec020107, 0x007f037f, 3097 0x00340020, 0x0080801f, 0x00000020, 0x00248492, 0x00000000, 3098 0x7112848b, 0x47c00bff, 0x00000036, 0x00000600, 0x02013169, 3099 0x0000001f, 0x00b91612, 0x40000100, 0x21f60000, 0x40000100, 3100 0xa0e40000, 0x00121820, 0x00000000, 0x00121820, 0x00007f7f, 3101 0x00000000, 0x000300a0, 0x00000000, 0x00000000, 0x00000000, 3102 0x00000000, 0x00000000, 0x28000000, 0x00000000, 0x00000000, 3103 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x64b22427, 3104 0x00766932, 0x00222222, 0x00040000, 0x77644302, 0x2f97d40c, 3105 0x00080740, 0x00020403, 0x0000907f, 0x20010201, 0xa0633333, 3106 0x3333bc43, 0x7a8f5b6b, 0x0000007f, 0xcc979975, 0x00000000, 3107 0x80608000, 0x00000000, 0x00127353, 0x00000000, 0x00000000, 3108 0x00000000, 0x00000000, 0x6437140a, 0x00000000, 0x00000282, 3109 0x30032064, 0x4653de68, 0x04518a3c, 0x00002101, 0x2a201c16, 3110 0x1812362e, 0x322c2220, 0x000e3c24, 0x01081008, 0x00000800, 3111 0xf0b50000, 0x30303030, 0x30303030, 0x03903030, 0x30303030, 3112 0x30303030, 0x30303030, 0x30303030, 0x00000000, 0x1000dc1f, 3113 0x10008c1f, 0x02140102, 0x681604c2, 0x01007c00, 0x01004800, 3114 0xfb000000, 0x000028d1, 0x1000dc1f, 0x10008c1f, 0x02140102, 3115 0x28160d05, 0x00000008, 0x0fc05656, 0x03c09696, 0x03c09696, 3116 0x0c005656, 0x0c005656, 0x0c005656, 0x0c005656, 0x03c09696, 3117 0x0c005656, 0x03c09696, 0x03c09696, 0x03c09696, 0x03c09696, 3118 0x0000d6d6, 0x0000d6d6, 0x0fc01616, 0xb0000c1c, 0x00000001, 3119 0x00000003, 0x00000000, 0x00000300 3120 }; 3121 3122 static const uint32_t rtl8192eu_agc_vals[] = { 3123 0xfb000001, 0xfb010001, 0xfb020001, 0xfb030001, 0xfb040001, 3124 0xfb050001, 0xfb060001, 0xfa070001, 0xf9080001, 0xf8090001, 3125 0xf70a0001, 0xf60b0001, 0xf50c0001, 0xf40d0001, 0xf30e0001, 3126 0xf20f0001, 0xf1100001, 0xf0110001, 0xef120001, 0xee130001, 3127 0xed140001, 0xec150001, 0xeb160001, 0xea170001, 0xcd180001, 3128 0xcc190001, 0xcb1a0001, 0xca1b0001, 0xc91c0001, 0xc81d0001, 3129 0x071e0001, 0x061f0001, 0x05200001, 0x04210001, 0x03220001, 3130 0xaa230001, 0xa9240001, 0xa8250001, 0xa7260001, 0xa6270001, 3131 0x85280001, 0x84290001, 0x832a0001, 0x252b0001, 0x242c0001, 3132 0x232d0001, 0x222e0001, 0x672f0001, 0x66300001, 0x65310001, 3133 0x64320001, 0x63330001, 0x62340001, 0x61350001, 0x45360001, 3134 0x44370001, 0x43380001, 0x42390001, 0x413a0001, 0x403b0001, 3135 0x403c0001, 0x403d0001, 0x403e0001, 0x403f0001, 0xfb400001, 3136 0xfb410001, 0xfb420001, 0xfb430001, 0xfb440001, 0xfb450001, 3137 0xfb460001, 0xfa470001, 0xf9480001, 0xf8490001, 0xf74a0001, 3138 0xf64b0001, 0xf54c0001, 0xf44d0001, 0xf34e0001, 0xf24f0001, 3139 0xf1500001, 0xf0510001, 0xef520001, 0xee530001, 0xed540001, 3140 0xec550001, 0xeb560001, 0xea570001, 0xe9580001, 0xe8590001, 3141 0xe75a0001, 0xe65b0001, 0xe55c0001, 0xe45d0001, 0xe35e0001, 3142 0xe25f0001, 0xe1600001, 0x8a610001, 0x89620001, 0x88630001, 3143 0x87640001, 0x86650001, 0x85660001, 0x84670001, 0x83680001, 3144 0x82690001, 0x6b6a0001, 0x6a6b0001, 0x696c0001, 0x686d0001, 3145 0x676e0001, 0x666f0001, 0x65700001, 0x64710001, 0x63720001, 3146 0x62730001, 0x61740001, 0x49750001, 0x48760001, 0x47770001, 3147 0x46780001, 0x45790001, 0x447a0001, 0x437b0001, 0x427c0001, 3148 0x417d0001, 0x407e0001, 0x407f0001 3149 }; 3150 3151 static const struct r92c_bb_prog rtl8192eu_bb_prog = { 3152 nitems(rtl8192e_bb_regs), 3153 rtl8192e_bb_regs, 3154 rtl8192e_bb_vals, 3155 nitems(rtl8192eu_agc_vals), 3156 rtl8192eu_agc_vals 3157 }; 3158 3159 3160 /* 3161 * RTL8188RU. 3162 */ 3163 static const uint32_t rtl8188ru_rf_vals[] = { 3164 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1adb0, 3165 0x54867, 0x8992e, 0x0e529, 0x39ce7, 0x00451, 0x00000, 0x00255, 3166 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000, 3167 0x0083c, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x977c0, 3168 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 3169 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 3170 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 3171 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 3172 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 3173 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 3174 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 3175 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 3176 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 3177 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 3178 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100, 0xd8000, 3179 0x90000, 0x51000, 0x12000, 0x28fb4, 0x24fa8, 0x207a4, 0x1c798, 3180 0x183a4, 0x14398, 0x101a4, 0x0c198, 0x080a4, 0x04098, 0x00014, 3181 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f405, 0x4f405, 0x8f405, 3182 0xcf405, 0xe0330, 0xa0330, 0x60330, 0x20330, 0x10159, 0x0f401, 3183 0x00000, 0x00000, 0x80003, 0x00000, 0x00000, 0x44457, 0x80000, 3184 0x30159 3185 }; 3186 3187 static const struct r92c_rf_prog rtl8188ru_rf_prog[] = { 3188 { 3189 nitems(rtl8192ce_rf1_regs), 3190 rtl8192ce_rf1_regs, 3191 rtl8188ru_rf_vals 3192 } 3193 }; 3194 3195 /* 3196 * RTL8723AE and RTL8723AU. 3197 */ 3198 3199 static const uint16_t rtl8723a_rf_regs[] = { 3200 0x00, 0x01, 0x02, 0x03, 0x04, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 3201 0x0f, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22, 3202 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2a, 0x2b, 3203 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 3204 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 3205 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 3206 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 3207 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 0x2c, 0x2a, 0x2b, 0x2b, 3208 0x2c, 0x2a, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 0x11, 0x10, 3209 0x11, 0x10, 0x11, 0x10, 0x11, 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 3210 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x14, 0x14, 3211 0x14, 0x14, 0x15, 0x15, 0x15, 0x15, 0x16, 0x16, 0x16, 0x16, 0x00, 3212 0x18, 0xfe, 0xfe, 0x1f, 0xfe, 0xfe, 0x1e, 0x1f, 0x00 3213 }; 3214 3215 static const uint32_t rtl8723a_rf_vals[] = { 3216 0x30159, 0x31284, 0x98000, 0x18c63, 0x210e7, 0x2044f, 0x1a3f1, 3217 0x14787, 0x896fe, 0x0e02c, 0x39ce7, 0x00451, 0x00000, 0x30355, 3218 0x60a00, 0xfc378, 0xa1250, 0x4445f, 0x80001, 0x0b614, 0x6c000, 3219 0x00000, 0x01558, 0x00060, 0x00483, 0x4f000, 0xec7d9, 0x57730, 3220 0x04783, 0x00001, 0x21334, 0x00000, 0x00054, 0x00001, 0x00808, 3221 0x53333, 0x0000c, 0x00002, 0x00808, 0x5b333, 0x0000d, 0x00003, 3222 0x00808, 0x63333, 0x0000d, 0x00004, 0x00808, 0x6b333, 0x0000d, 3223 0x00005, 0x00808, 0x73333, 0x0000d, 0x00006, 0x00709, 0x5b333, 3224 0x0000d, 0x00007, 0x00709, 0x63333, 0x0000d, 0x00008, 0x0060a, 3225 0x4b333, 0x0000d, 0x00009, 0x0060a, 0x53333, 0x0000d, 0x0000a, 3226 0x0060a, 0x5b333, 0x0000d, 0x0000b, 0x0060a, 0x63333, 0x0000d, 3227 0x0000c, 0x0060a, 0x6b333, 0x0000d, 0x0000d, 0x0060a, 0x73333, 3228 0x0000d, 0x0000e, 0x0050b, 0x66666, 0x0001a, 0xe0000, 0x4000f, 3229 0xe31fc, 0x6000f, 0xff9f8, 0x2000f, 0x203f9, 0x3000f, 0xff500, 3230 0x00000, 0x00000, 0x8000f, 0x3f100, 0x9000f, 0x23100, 0x32000, 3231 0x71000, 0xb0000, 0xfc000, 0x287b3, 0x244b7, 0x204ab, 0x1c49f, 3232 0x18493, 0x1429b, 0x10299, 0x0c29c, 0x081a0, 0x040ac, 0x00020, 3233 0x1944c, 0x59444, 0x9944c, 0xd9444, 0x0f424, 0x4f407, 0x8f424, 3234 0xcf424, 0x00339, 0x40339, 0x80339, 0xc0336, 0x10159, 0x0f401, 3235 0x00000, 0x00000, 0x80003, 0x00000, 0x00000, 0x44457, 0x80000, 3236 0x30159 3237 }; 3238 3239 static const struct r92c_rf_prog rtl8723a_rf_prog[] = { 3240 { 3241 nitems(rtl8723a_rf_regs), 3242 rtl8723a_rf_regs, 3243 rtl8723a_rf_vals 3244 } 3245 }; 3246 3247 struct r92c_txpwr { 3248 uint8_t pwr[3][28]; 3249 }; 3250 3251 /* 3252 * Per RF chain/group/rate Tx gain values. 3253 */ 3254 static const struct r92c_txpwr rtl8192cu_txagc[] = { 3255 { { /* Chain 0. */ 3256 { /* Group 0. */ 3257 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 3258 0x0c, 0x0c, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, /* OFDM6~54. */ 3259 0x0e, 0x0d, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02, /* MCS0~7. */ 3260 0x0e, 0x0d, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x02 /* MCS8~15. */ 3261 }, 3262 { /* Group 1. */ 3263 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 3264 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 3265 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 3266 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 3267 }, 3268 { /* Group 2. */ 3269 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 3270 0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x02, 0x00, /* OFDM6~54. */ 3271 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 3272 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 3273 } 3274 } }, 3275 { { /* Chain 1. */ 3276 { /* Group 0. */ 3277 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 3278 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 3279 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 3280 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 3281 }, 3282 { /* Group 1. */ 3283 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 3284 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 3285 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 3286 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 3287 }, 3288 { /* Group 2. */ 3289 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 3290 0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x02, 0x00, /* OFDM6~54. */ 3291 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 3292 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 3293 } 3294 } } 3295 }; 3296 3297 static const struct r92c_txpwr rtl8188ru_txagc[] = { 3298 { { /* Chain 0. */ 3299 { /* Group 0. */ 3300 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 3301 0x08, 0x08, 0x08, 0x06, 0x06, 0x04, 0x04, 0x00, /* OFDM6~54. */ 3302 0x08, 0x06, 0x06, 0x04, 0x04, 0x02, 0x02, 0x00, /* MCS0~7. */ 3303 0x08, 0x06, 0x06, 0x04, 0x04, 0x02, 0x02, 0x00 /* MCS8~15. */ 3304 }, 3305 { /* Group 1. */ 3306 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 3307 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 3308 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 3309 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 3310 }, 3311 { /* Group 2. */ 3312 0x00, 0x00, 0x00, 0x00, /* CCK1~11. */ 3313 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* OFDM6~54. */ 3314 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* MCS0~7. */ 3315 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* MCS8~15. */ 3316 } 3317 } } 3318 }; 3319