xref: /openbsd/sys/dev/mii/rgephyreg.h (revision 8a9da3c4)
1 /*	$OpenBSD: rgephyreg.h,v 1.10 2023/04/05 10:45:07 kettenis Exp $	*/
2 /*
3  * Copyright (c) 2003
4  *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Bill Paul.
17  * 4. Neither the name of the author nor the names of any co-contributors
18  *    may be used to endorse or promote products derived from this software
19  *    without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31  * THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  * $FreeBSD: rgephyreg.h,v 1.1 2003/09/11 03:53:46 wpaul Exp $
34  */
35 
36 #ifndef _DEV_MII_RGEPHYREG_H_
37 #define	_DEV_MII_RGEPHYREG_H_
38 
39 #define RGEPHY_8211B		2
40 #define RGEPHY_8211C		3
41 #define RGEPHY_8211F		6
42 
43 /*
44  * Realtek 8169S/8110S gigE PHY registers
45  */
46 
47 /* RTL8211B(L)/RTL8211C(L) */
48 #define RGEPHY_CR		0x10	/* PHY Specific Control */
49 #define RGEPHY_CR_ASSERT_CRS	0x0800
50 #define RGEPHY_CR_FORCE_LINK	0x0400
51 #define RGEPHY_CR_MDI_MASK	0x0060
52 #define RGEPHY_CR_MDIX_AUTO	0x0040
53 #define RGEPHY_CR_MDIX_MANUAL	0x0020
54 #define RGEPHY_CR_MDI_MANUAL	0x0000
55 #define RGEPHY_CR_CLK125_DIS	0x0010
56 #define RGEPHY_CR_ALDPS		0x0004	/* RTL8251 only */
57 #define RGEPHY_CR_JABBER_DIS	0x0001
58 
59 /* RTL8211B(L)/RTL8211C(L) */
60 #define RGEPHY_SR		0x11	/* PHY Specific Status */
61 #define RGEPHY_SR_SPEED_1000MBPS	0x8000
62 #define RGEPHY_SR_SPEED_100MBPS		0x4000
63 #define RGEPHY_SR_SPEED_10MBPS		0x0000
64 #define RGEPHY_SR_SPEED_MASK		0xc000
65 #define RGEPHY_SR_FDX			0x2000	/* full duplex */
66 #define RGEPHY_SR_PAGE_RECEIVED		0x1000	/* new page received */
67 #define RGEPHY_SR_SPD_DPLX_RESOLVED	0x0800	/* speed/duplex resolved */
68 #define RGEPHY_SR_LINK			0x0400	/* link up */
69 #define RGEPHY_SR_MDI_XOVER		0x0040	/* MDI crossover */
70 #define RGEPHY_SR_ALDPS			0x0008	/* RTL8211C(L) only */
71 #define RGEPHY_SR_JABBER		0x0001	/* Jabber */
72 #define RGEPHY_SR_SPEED(X)		((X) & RGEPHY_SR_SPEED_MASK)
73 
74 /* RTL8211F */
75 #define RGEPHY_F_SR		0x1A	/* PHY Specific Status */
76 #define RGEPHY_F_SR_SPEED_1000MBPS	0x0020
77 #define RGEPHY_F_SR_SPEED_100MBPS	0x0010
78 #define RGEPHY_F_SR_SPEED_10MBPS	0x0000
79 #define RGEPHY_F_SR_SPEED_MASK		0x0030
80 #define RGEPHY_F_SR_FDX			0x0008
81 #define RGEPHY_F_SR_LINK		0x0004
82 #define RGEPHY_F_SR_SPEED(X)		((X) & RGEPHY_F_SR_SPEED_MASK)
83 
84 #define RGEPHY_LC		0x18	/* PHY LED Control Register */
85 #define RGEPHY_LC_P2		0x1A	/* PHY LED Control Register, Page 2 */
86 #define RGEPHY_LC_DISABLE	0x8000	/* disable leds */
87 /* Led pusle strething */
88 #define RGEPHY_LC_PULSE_1_3S	0x7000
89 #define RGEPHY_LC_PULSE_670MS	0x6000
90 #define RGEPHY_LC_PULSE_340MS	0x5000
91 #define RGEPHY_LC_PULSE_170MS	0x4000
92 #define RGEPHY_LC_PULSE_84MS	0x3000
93 #define RGEPHY_LC_PULSE_42MS	0x2000
94 #define RGEPHY_LC_PULSE_21MS	0x1000
95 #define RGEPHY_LC_PULSE_0MS	0x0000
96 #define RGEPHY_LC_LINK		0x0008 /* Link and speed indicated by combination of leds */
97 #define RGEPHY_LC_DUPLEX	0x0004
98 #define RGEPHY_LC_RX		0x0002
99 #define RGEPHY_LC_TX		0x0001
100 
101 #define RGEPHY_PS		0x1F	/* Page Select Register */
102 #define RGEPHY_PS_PAGE_0	0x0000
103 #define RGEPHY_PS_PAGE_1	0x0001
104 #define RGEPHY_PS_PAGE_2	0x0002
105 #define RGEPHY_PS_PAGE_3	0x0003
106 #define RGEPHY_PS_PAGE_4	0x0004
107 
108 /* RTL8211F */
109 #define RGEPHY_PS_PAGE_MII	0x0d08
110 #define RGEPHY_MIICR1		0x11
111 #define RGEPHY_MIICR1_TXDLY_EN	0x0100
112 #define RGEPHY_MIICR2		0x15
113 #define RGEPHY_MIICR2_RXDLY_EN	0x0008
114 
115 #endif /* _DEV_RGEPHY_MIIREG_H_ */
116