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Searched refs:RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8111 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK 0x30000 macro
H A Dgfx_8_0_sh_mask.h9023 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK 0x30000 macro
H A Dgfx_8_1_sh_mask.h9563 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK 0x30000 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19816 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK … macro
H A Dgc_9_1_sh_mask.h21127 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK … macro
H A Dgc_9_2_1_sh_mask.h21054 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK … macro
H A Dgc_9_4_3_sh_mask.h23182 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK … macro
H A Dgc_9_4_2_sh_mask.h13260 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK … macro
H A Dgc_11_0_0_sh_mask.h27173 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK … macro
H A Dgc_10_1_0_sh_mask.h27792 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK … macro
H A Dgc_11_0_3_sh_mask.h29694 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK … macro
H A Dgc_10_3_0_sh_mask.h26071 #define RLC_GPM_PERF_COUNT_0__EVENT_SEL_MASK … macro