Searched refs:RegHi (Results 1 – 6 of 6) sorted by relevance
/openbsd/gnu/llvm/llvm/lib/Target/CSKY/ |
H A D | CSKYISelLowering.cpp | 466 Register RegHi = RegLo + 1; in LowerReturn() local 471 Chain = DAG.getCopyToReg(Chain, DL, RegHi, Hi, Glue); in LowerReturn() 473 RetOps.push_back(DAG.getRegister(RegHi, MVT::i32)); in LowerReturn()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 2665 int64_t RegLo, RegHi; in ParseRegRange() local 2677 if (!parseExpr(RegHi)) in ParseRegRange() 2680 RegHi = RegLo; in ParseRegRange() 2691 if (!isUInt<32>(RegHi)) { in ParseRegRange() 2696 if (RegLo > RegHi) { in ParseRegRange() 2702 RegWidth = 32 * ((RegHi - RegLo) + 1); in ParseRegRange()
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMExpandPseudoInsts.cpp | 1842 Register RegHi = TRI->getSubReg(Reg.getReg(), ARM::gsub_1); in addExclusiveRegPair() local 1844 MIB.addReg(RegHi, Flags); in addExclusiveRegPair()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 2208 Register RegHi = RI.getSubReg(Reg, AMDGPU::sub1); in expandPostRAPseudo() local 2221 MachineInstrBuilder MIB = BuildMI(MF, DL, get(AMDGPU::S_ADDC_U32), RegHi) in expandPostRAPseudo() 2222 .addReg(RegHi); in expandPostRAPseudo()
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/openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 13188 Register RegHi = RegLo + 1; in LowerReturn() local 13191 STI.isRegisterReservedByUser(RegHi)) in LowerReturn() 13199 Chain = DAG.getCopyToReg(Chain, DL, RegHi, Hi, Glue); in LowerReturn() 13201 RetOps.push_back(DAG.getRegister(RegHi, MVT::i32)); in LowerReturn()
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/openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 4126 Register RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC); in LowerFormalArguments_32SVR4() local 4128 SDValue ArgValueHi = DAG.getCopyFromReg(Chain, dl, RegHi, MVT::i32); in LowerFormalArguments_32SVR4()
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