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Searched refs:Ril (Results 1 – 2 of 2) sorted by relevance

/openbsd/sys/arch/amd64/amd64/
H A Ddb_disasm.c94 #define Ril 36 /* long register in instruction */ macro
315 /*c8*/ { "bswap", 0, LONG, op1(Ril), 0 },
316 /*c9*/ { "bswap", 0, LONG, op1(Ril), 0 },
317 /*ca*/ { "bswap", 0, LONG, op1(Ril), 0 },
318 /*cb*/ { "bswap", 0, LONG, op1(Ril), 0 },
319 /*cc*/ { "bswap", 0, LONG, op1(Ril), 0 },
320 /*cd*/ { "bswap", 0, LONG, op1(Ril), 0 },
321 /*ce*/ { "bswap", 0, LONG, op1(Ril), 0 },
322 /*cf*/ { "bswap", 0, LONG, op1(Ril), 0 },
1320 case Ril: in db_disasm()
/openbsd/sys/arch/i386/i386/
H A Ddb_disasm.c95 #define Ril 36 /* long register in instruction */ macro
316 /*c8*/ { "bswap", 0, LONG, op1(Ril), 0 },
317 /*c9*/ { "bswap", 0, LONG, op1(Ril), 0 },
318 /*ca*/ { "bswap", 0, LONG, op1(Ril), 0 },
319 /*cb*/ { "bswap", 0, LONG, op1(Ril), 0 },
320 /*cc*/ { "bswap", 0, LONG, op1(Ril), 0 },
321 /*cd*/ { "bswap", 0, LONG, op1(Ril), 0 },
322 /*ce*/ { "bswap", 0, LONG, op1(Ril), 0 },
323 /*cf*/ { "bswap", 0, LONG, op1(Ril), 0 },
1277 case Ril: in db_disasm()