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Searched refs:SHADDR (Results 1 – 8 of 8) sorted by relevance

/openbsd/sys/dev/microcode/aic7xxx/
H A Daic7xxx.seq1093 mov SCB_RESIDUAL_DATACNT[3], SHADDR;
1171 * Reload HADDR from SHADDR and setup the
1175 bmov HADDR, SHADDR, 4;
1180 mvi SHADDR call bcopy_4;
1732 * we can only ack the message after SHADDR has been saved. On these
1733 * chips, SHADDR increments with every bus transaction, even PIO.
1760 * and the SCB_DATAPTR becomes the current SHADDR.
1765 bmov SCB_DATAPTR, SHADDR, 4;
1772 mvi SHADDR call bcopy_4;
H A Daic7xxx.reg417 * manner as STCNT is counted down. SHADDR should always be used
421 register SHADDR {
H A Daic7xxx_reg.h1222 #define SHADDR 0x14 macro
H A Daic79xx.seq1369 * The SCB_DATAPTR becomes the current SHADDR.
1373 bmov SCB_DATAPTR, SHADDR, 8;
H A Daic79xx_reg.h3040 #define SHADDR 0x60 macro
H A Daic79xx.reg2430 register SHADDR {
/openbsd/sys/dev/ic/
H A Daic79xx.c745 ahd_outq(ahd, SCB_DATAPTR, ahd_inq(ahd, SHADDR)); in ahd_run_data_fifo()
4911 data_addr = ahd_inq(ahd, SHADDR); in ahd_handle_ign_wide_residue()
8846 ahd_inl(ahd, SHADDR+4), in ahd_dump_card_state()
8847 ahd_inl(ahd, SHADDR), in ahd_dump_card_state()
H A Daic7xxx.c3659 data_addr = ahc_inl(ahc, SHADDR); in ahc_handle_ign_wide_residue()