| /openbsd/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 749 SHL_PARTS, enumerator
|
| /openbsd/gnu/llvm/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 121 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); in LanaiTargetLowering()
190 case ISD::SHL_PARTS: in LowerOperation()
|
| /openbsd/gnu/llvm/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 111 setOperationAction(ISD::SHL_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
112 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand); in MSP430TargetLowering()
|
| /openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 322 case ISD::SHL_PARTS: return "shl_parts"; in getOperationName()
|
| H A D | SelectionDAG.cpp | 3371 case ISD::SHL_PARTS: in computeKnownBits()
3386 if (Opcode == ISD::SHL_PARTS) in computeKnownBits()
9389 case ISD::SHL_PARTS: in getNode()
|
| H A D | LegalizeDAG.cpp | 1264 case ISD::SHL_PARTS: { in LegalizeOp()
|
| H A D | LegalizeIntegerTypes.cpp | 4266 PartsOpc = ISD::SHL_PARTS; in ExpandIntRes_Shift()
|
| H A D | TargetLowering.cpp | 7663 bool IsSHL = Node->getOpcode() == ISD::SHL_PARTS; in expandShiftParts()
|
| /openbsd/gnu/llvm/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 112 setOperationAction(ISD::SHL_PARTS, VT, Expand); in BPFTargetLowering()
|
| /openbsd/gnu/llvm/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 438 setOperationAction(ISD::SHL_PARTS, MVT::i32 , Custom); in NVPTXTargetLowering()
441 setOperationAction(ISD::SHL_PARTS, MVT::i64 , Custom); in NVPTXTargetLowering()
2145 assert(Op.getOpcode() == ISD::SHL_PARTS); in LowerShiftLeftParts()
2314 case ISD::SHL_PARTS: in LowerOperation()
|
| /openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 153 setOperationAction({ISD::SHL_PARTS, ISD::SRL_PARTS, ISD::SRA_PARTS}, MVT::i32, in R600TargetLowering()
403 case ISD::SHL_PARTS: in LowerOperation()
|
| /openbsd/gnu/llvm/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 65 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in CSKYTargetLowering()
|
| /openbsd/gnu/llvm/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 58 setOperationAction(ISD::SHL_PARTS, GRLenVT, Custom); in LoongArchTargetLowering()
234 case ISD::SHL_PARTS: in LowerOperation()
|
| /openbsd/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 104 for (auto OP : {ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS}) in M68kTargetLowering()
1388 case ISD::SHL_PARTS: in LowerOperation()
|
| /openbsd/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 361 setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); in MipsTargetLowering()
367 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); in MipsTargetLowering()
1234 case ISD::SHL_PARTS: return lowerShiftLeftParts(Op, DAG); in LowerOperation()
|
| /openbsd/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1791 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1825 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand); in SparcTargetLowering()
|
| /openbsd/gnu/llvm/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 100 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in XCoreTargetLowering()
|
| /openbsd/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 144 ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, ISD::SRA_PARTS, in WebAssemblyTargetLowering()
|
| /openbsd/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 94 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand); in AVRTargetLowering()
|
| /openbsd/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 170 setOperationAction(ISD::SHL_PARTS, IntVT, Expand); in initSPUActions()
|
| /openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1582 ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS, in HexagonTargetLowering()
|
| /openbsd/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1155 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); in ARMTargetLowering()
1172 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in ARMTargetLowering()
6350 assert(Op.getOpcode() == ISD::SHL_PARTS); in LowerShiftLeftParts()
10451 case ISD::SHL_PARTS: return LowerShiftLeftParts(Op, DAG); in LowerOperation()
|
| /openbsd/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 733 setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); in PPCTargetLowering()
738 setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); in PPCTargetLowering()
11349 case ISD::SHL_PARTS: return LowerSHL_PARTS(Op, DAG); in LowerOperation()
|
| /openbsd/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 274 setOperationAction({ISD::SHL_PARTS, ISD::SRL_PARTS, ISD::SRA_PARTS}, XLenVT, in RISCVTargetLowering()
3750 case ISD::SHL_PARTS: in LowerOperation()
|
| /openbsd/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 293 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand); in SystemZTargetLowering()
|