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Searched refs:SPLL_FB_DIV_MASK (Results 1 – 18 of 18) sorted by relevance

/openbsd/sys/dev/pci/drm/radeon/
H A Drv740d.h39 #define SPLL_FB_DIV_MASK (0x3ffffff << 0) macro
H A Drv730d.h42 #define SPLL_FB_DIV_MASK (0x3ffffff << 0) macro
H A Drs780d.h33 # define SPLL_FB_DIV_MASK (0xff << 2) macro
H A Drv740_dpm.c153 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK; in rv740_populate_sclk_value()
H A Drv730_dpm.c84 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK; in rv730_populate_sclk_value()
H A Drv770d.h106 #define SPLL_FB_DIV_MASK (0x3ffffff << 0) macro
H A Dnid.h552 #define SPLL_FB_DIV_MASK (0x3ffffff << 0) macro
H A Drs780_dpm.c212 u32 fbdiv = (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in rs780_preset_starting_fbdiv()
H A Dsid.h101 #define SPLL_FB_DIV_MASK (0x3ffffff << 0) macro
H A Dcikd.h262 #define SPLL_FB_DIV_MASK (0x3ffffff << 0) macro
H A Devergreend.h88 #define SPLL_FB_DIV_MASK (0x3ffffff << 0) macro
H A Dr600d.h1276 # define SPLL_FB_DIV_MASK (0xff << 5) macro
H A Dni_dpm.c2036 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK; in ni_calculate_sclk_params()
2117 fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in ni_init_smc_spll_table()
H A Drv770_dpm.c535 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK; in rv770_populate_sclk_value()
H A Dsi_dpm.c2851 fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in si_init_smc_spll_table()
4800 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK; in si_calculate_sclk_params()
H A Dci_dpm.c3144 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK; in ci_calculate_sclk_params()
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dsid.h102 #define SPLL_FB_DIV_MASK (0x3ffffff << 0) macro
/openbsd/sys/dev/pci/drm/amd/pm/legacy-dpm/
H A Damdgpu_si_dpm.c2966 fb_div = (sclk_params.vCG_SPLL_FUNC_CNTL_3 & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in si_init_smc_spll_table()
5302 spll_func_cntl_3 &= ~SPLL_FB_DIV_MASK; in si_calculate_sclk_params()