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Searched refs:SQ_SOPP__SIMM16_MASK (Results 1 – 9 of 9) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9526 #define SQ_SOPP__SIMM16_MASK 0x0000ffffL macro
H A Dgfx_7_2_sh_mask.h13051 #define SQ_SOPP__SIMM16_MASK 0xffff macro
H A Dgfx_8_0_sh_mask.h14957 #define SQ_SOPP__SIMM16_MASK 0xffff macro
H A Dgfx_8_1_sh_mask.h15355 #define SQ_SOPP__SIMM16_MASK 0xffff macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2941 #define SQ_SOPP__SIMM16_MASK macro
H A Dgc_9_1_sh_mask.h2789 #define SQ_SOPP__SIMM16_MASK macro
H A Dgc_9_2_1_sh_mask.h2747 #define SQ_SOPP__SIMM16_MASK macro
H A Dgc_9_4_3_sh_mask.h3219 #define SQ_SOPP__SIMM16_MASK macro
H A Dgc_9_4_2_sh_mask.h26430 #define SQ_SOPP__SIMM16_MASK macro