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Searched refs:SRBM_GFX_CNTL (Results 1 – 6 of 6) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dvi.c583 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, PIPEID, pipe); in vi_srbm_select()
584 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, MEID, me); in vi_srbm_select()
585 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, VMID, vmid); in vi_srbm_select()
586 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, QUEUEID, queue); in vi_srbm_select()
/openbsd/sys/dev/pci/drm/radeon/
H A Dcik_sdma.c960 radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); in cik_dma_vm_flush()
980 radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); in cik_dma_vm_flush()
H A Dnid.h59 #define SRBM_GFX_CNTL 0x0E44 macro
H A Dcikd.h444 #define SRBM_GFX_CNTL 0xE44 macro
H A Dni.c1382 WREG32(SRBM_GFX_CNTL, RINGID(ring)); in cayman_cp_int_cntl_setup()
H A Dcik.c1848 WREG32(SRBM_GFX_CNTL, srbm_gfx_cntl); in cik_srbm_select()
5699 radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); in cik_vm_flush()
5717 radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); in cik_vm_flush()