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Searched refs:SSTAT1 (Results 1 – 10 of 10) sorted by relevance

/openbsd/sys/dev/ic/
H A Daic6360reg.h74 #define SSTAT1 0x0c /* SCSI status 1 */ macro
H A Daic6360.c875 sstat1 = bus_space_read_1(iot, ioh, SSTAT1); in aic_msgin()
1253 sstat1 = bus_space_read_1(iot, ioh, SSTAT1); in aic_msgout()
1602 sstat1 = bus_space_read_1(iot, ioh, SSTAT1); in aicintr()
2061 bus_space_read_1(iot, ioh, SSTAT1), in aic_dump6360()
H A Daic7xxx.c784 && (ahc_inb(ahc, SSTAT1) & SCSIPERR) != 0) { in ahc_handle_seqint()
1019 status = ahc_inb(ahc, SSTAT1) & (SELTO|SCSIRSTI|BUSFREE|SCSIPERR); in ahc_handle_scsiint()
1024 status = ahc_inb(ahc, SSTAT1) in ahc_handle_scsiint()
1107 if ((ahc_inb(ahc, SSTAT1) & SCSIPERR) != 0 in ahc_handle_scsiint()
6468 ahc_sstat1_print(ahc_inb(ahc, SSTAT1), &cur_col, 50); in ahc_dump_card_state()
H A Daic79xx.c1502 && (ahd_inb(ahd, SSTAT1) & SELTO) == 0) in ahd_handle_seqint()
1555 status = ahd_inb(ahd, SSTAT1) & (SELTO|SCSIRSTI|BUSFREE|SCSIPERR); in ahd_handle_scsiint()
7777 if ((ahd_inb(ahd, SSTAT1) & SCSIRSTI) != 0) { in ahd_reset_poll()
8732 ahd_sstat1_print(ahd_inb(ahd, SSTAT1), &cur_col, 50); in ahd_dump_card_state()
/openbsd/sys/dev/microcode/aic7xxx/
H A Daic7xxx.seq688 test SSTAT1,REQINIT|BUSFREE jz .;
689 test SSTAT1, BUSFREE jnz poll_for_work;
901 test SSTAT1,PHASEMIS jz .;
932 test SSTAT1,PHASEMIS jz ultra2_dma_loop;
1271 test SSTAT1, REQINIT jz .;
1273 test SSTAT1,PHASEMIS jz data_phase_loop;
1354 test SSTAT1, REQINIT jnz .;
1448 test SSTAT1, PHASEMIS jz . - 1;
1989 test SSTAT1, REQINIT jz inb_next_wait;
2120 test SSTAT1, REQINIT jz phase_lock;
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H A Daic79xx.seq921 test SSTAT1, PHASEMIS jnz p_command_xfer_failed;
1328 test SSTAT1,REQINIT|BUSFREE jz .;
1338 test SSTAT1, BUSFREE jnz idle_loop;
1415 test SSTAT1, SCSIPERR jnz phase_lock;
1442 test SSTAT1, SCSIPERR jnz inb_next_wait;
1742 test SSTAT1, REQINIT jz .;
1759 test SSTAT1, REQINIT jnz .;
1894 test SSTAT1, REQINIT jz snapshot_wait_data_valid;
H A Daic7xxx.reg296 * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
313 register SSTAT1 {
H A Daic7xxx_reg.h1166 #define SSTAT1 0x0c macro
H A Daic79xx.reg1866 register SSTAT1 {
1882 * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
H A Daic79xx_reg.h2776 #define SSTAT1 0x4c macro