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Searched refs:SrcIdx (Results 1 – 23 of 23) sorted by relevance

/openbsd/gnu/llvm/clang/lib/CodeGen/
H A DCGNonTrivialStruct.cpp687 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], CurStructOffset, FD); in visitARCStrong()
697 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], CurStructOffset, FD); in visitARCWeak()
704 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], Offset); in callSpecialFunction()
717 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], CurStructOffset, FD); in visitARCStrong()
729 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], CurStructOffset, FD); in visitARCWeak()
736 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], Offset); in callSpecialFunction()
749 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], CurStructOffset, FD); in visitARCStrong()
759 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], CurStructOffset, FD); in visitARCWeak()
766 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], Offset); in callSpecialFunction()
780 Addrs[SrcIdx] = getAddrWithOffset(Addrs[SrcIdx], CurStructOffset, FD); in visitARCStrong()
[all …]
/openbsd/gnu/llvm/llvm/lib/CodeGen/
H A DRegisterCoalescer.h42 unsigned SrcIdx = 0; variable
106 unsigned getSrcIdx() const { return SrcIdx; } in getSrcIdx()
H A DTwoAddressInstructionPass.cpp1221 Register regB = MI.getOperand(SrcIdx).getReg(); in tryInstructionTransform()
1255 regB = MI.getOperand(SrcIdx).getReg(); in tryInstructionTransform()
1415 for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) { in collectTiedOperands() local
1420 MachineOperand &SrcMO = MI->getOperand(SrcIdx); in collectTiedOperands()
1464 unsigned SrcIdx = TP.first; in processTiedPairs() local
1472 RegB = MI->getOperand(SrcIdx).getReg(); in processTiedPairs()
1473 SubRegB = MI->getOperand(SrcIdx).getSubReg(); in processTiedPairs()
1548 MachineOperand &MO = MI->getOperand(SrcIdx); in processTiedPairs()
1649 unsigned SrcIdx = TO.second[0].first; in processStatepoint() local
1711 if (MI->getOperand(SrcIdx).isKill()) in processStatepoint()
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H A DRegisterCoalescer.cpp454 SrcIdx = DstIdx = 0; in setRegisters()
507 SrcIdx = DstSub; in setRegisters()
524 if (DstIdx && !SrcIdx) { in setRegisters()
526 std::swap(SrcIdx, DstIdx); in setRegisters()
544 std::swap(SrcIdx, DstIdx); in flip()
583 return TRI.composeSubRegIndices(SrcIdx, SrcSub) == in isCoalescable()
1323 if (SrcIdx && DstIdx) in reMaterializeTrivialDef()
1370 assert(SrcIdx == 0 && CP.isFlipped() in reMaterializeTrivialDef()
1915 unsigned SrcIdx = CP.getSrcIdx(); in joinCopy() local
1918 std::swap(SrcIdx, DstIdx); in joinCopy()
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H A DPeepholeOptimizer.cpp1858 unsigned SrcIdx = Def->getNumOperands(); in getNextSourceFromBitcast() local
1859 for (unsigned OpIdx = DefIdx + 1, EndOpIdx = SrcIdx; OpIdx != EndOpIdx; in getNextSourceFromBitcast()
1868 if (SrcIdx != EndOpIdx) in getNextSourceFromBitcast()
1871 SrcIdx = OpIdx; in getNextSourceFromBitcast()
1876 if (SrcIdx >= Def->getNumOperands()) in getNextSourceFromBitcast()
1886 const MachineOperand &Src = Def->getOperand(SrcIdx); in getNextSourceFromBitcast()
H A DTargetRegisterInfo.cpp392 unsigned SrcIdx, DefIdx; in shareSameRegisterFile() local
395 SrcIdx, DefIdx) != nullptr; in shareSameRegisterFile()
/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ExpandPseudoInsts.cpp453 unsigned PredIdx, DOPIdx, SrcIdx, Src2Idx; in expand_DestructiveOp() local
460 std::tie(PredIdx, DOPIdx, SrcIdx) = std::make_tuple(1, 3, 2); in expand_DestructiveOp()
467 std::tie(PredIdx, DOPIdx, SrcIdx) = std::make_tuple(1, 2, 3); in expand_DestructiveOp()
470 std::tie(PredIdx, DOPIdx, SrcIdx) = std::make_tuple(2, 3, 3); in expand_DestructiveOp()
473 std::tie(PredIdx, DOPIdx, SrcIdx, Src2Idx) = std::make_tuple(1, 2, 3, 4); in expand_DestructiveOp()
494 DOPRegIsUnique = DstReg != MI.getOperand(SrcIdx).getReg(); in expand_DestructiveOp()
500 MI.getOperand(DOPIdx).getReg() != MI.getOperand(SrcIdx).getReg(); in expand_DestructiveOp()
509 (MI.getOperand(DOPIdx).getReg() != MI.getOperand(SrcIdx).getReg() && in expand_DestructiveOp()
606 .add(MI.getOperand(SrcIdx)); in expand_DestructiveOp()
614 .add(MI.getOperand(SrcIdx)); in expand_DestructiveOp()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp807 for (unsigned SrcIdx = 0; SrcIdx < BV->getNumSources(); ++SrcIdx) { in ConstantFoldCTLZ() local
808 if (auto MaybeFold = tryFoldScalar(BV->getSourceReg(SrcIdx))) { in ConstantFoldCTLZ()
1183 for (unsigned SrcIdx = 0; SrcIdx < BV->getNumSources(); ++SrcIdx) { in isConstantOrConstantVector() local
1184 if (getIConstantVRegValWithLookThrough(BV->getSourceReg(SrcIdx), MRI) || in isConstantOrConstantVector()
1185 getOpcodeDef<GImplicitDef>(BV->getSourceReg(SrcIdx), MRI)) in isConstantOrConstantVector()
H A DCombinerHelper.cpp1776 unsigned SrcIdx = MI.getNumOperands() - 1; in matchCombineUnmergeConstant() local
1777 Register SrcReg = MI.getOperand(SrcIdx).getReg(); in matchCombineUnmergeConstant()
1791 for (unsigned Idx = 0; Idx != SrcIdx; ++Idx) { in matchCombineUnmergeConstant()
1817 unsigned SrcIdx = MI.getNumOperands() - 1; in matchCombineUnmergeUndef() local
1818 Register SrcReg = MI.getOperand(SrcIdx).getReg(); in matchCombineUnmergeUndef()
3950 for (unsigned SrcIdx = 1; SrcIdx < MI.getNumOperands(); SrcIdx += 2) { in applyExtendThroughPhis() local
3951 auto *SrcMI = MRI.getVRegDef(MI.getOperand(SrcIdx).getReg()); in applyExtendThroughPhis()
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.h111 int getSelIdx(unsigned Opcode, unsigned SrcIdx) const;
309 MachineOperand &getFlagOp(MachineInstr &MI, unsigned SrcIdx = 0,
H A DR600InstrInfo.cpp233 int R600InstrInfo::getSelIdx(unsigned Opcode, unsigned SrcIdx) const { in getSelIdx()
249 if (getOperandIdx(Opcode, Row[0]) == (int)SrcIdx) { in getSelIdx()
292 int SrcIdx = getOperandIdx(MI.getOpcode(), Op[0]); in getSrcs() local
293 if (SrcIdx < 0) in getSrcs()
295 MachineOperand &MO = MI.getOperand(SrcIdx); in getSrcs()
1374 MachineOperand &R600InstrInfo::getFlagOp(MachineInstr &MI, unsigned SrcIdx, in getFlagOp() argument
1396 switch (SrcIdx) { in getFlagOp()
1413 switch (SrcIdx) { in getFlagOp()
H A DR600ISelLowering.h110 bool FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src,
H A DAMDGPUInstCombineIntrinsic.cpp1147 for (unsigned SrcIdx = 0; SrcIdx < 4; ++SrcIdx) { in simplifyAMDGCNMemoryIntrinsicDemanded() local
1148 const unsigned Bit = 1 << SrcIdx; in simplifyAMDGCNMemoryIntrinsicDemanded()
H A DR600ISelLowering.cpp1951 bool R600TargetLowering::FoldOperand(SDNode *ParentNode, unsigned SrcIdx, in FoldOperand() argument
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp2121 unsigned SrcIdx = 1; in addConstantComments() local
2124 ++SrcIdx; in addConstantComments()
2127 ++SrcIdx; in addConstantComments()
2130 unsigned MaskIdx = SrcIdx + 1 + X86::AddrDisp; in addConstantComments()
2132 assert(MI->getNumOperands() >= (SrcIdx + 1 + X86::AddrNumOperands) && in addConstantComments()
2141 OutStreamer.AddComment(getShuffleComment(MI, SrcIdx, SrcIdx, Mask)); in addConstantComments()
2199 unsigned SrcIdx = 1; in addConstantComments() local
2202 ++SrcIdx; in addConstantComments()
2205 ++SrcIdx; in addConstantComments()
2208 unsigned MaskIdx = SrcIdx + 1 + X86::AddrDisp; in addConstantComments()
[all …]
H A DX86InstrInfo.cpp2093 unsigned SrcIdx = (Imm >> 6) & 3; in commuteInstructionImpl() local
2097 if (DstIdx == SrcIdx && (ZMask & (1 << DstIdx)) == 0 && in commuteInstructionImpl()
6009 unsigned SrcIdx = (Imm >> 6) & 3; in foldMemoryOperandCustom() local
6015 int PtrOffset = SrcIdx * 4; in foldMemoryOperandCustom()
H A DX86ISelLowering.cpp8163 unsigned SrcIdx = M / Size; in getTargetShuffleAndZeroables() local
8203 if (IsSrcConstant[SrcIdx]) { in getTargetShuffleAndZeroables()
8204 if (UndefSrcElts[SrcIdx][M]) in getTargetShuffleAndZeroables()
8206 else if (SrcEltBits[SrcIdx][M] == 0) in getTargetShuffleAndZeroables()
14232 int SrcIdx = i + Offset; in lowerShuffleAsSpecificZeroOrAnyExtend() local
14233 ShMask[i] = SafeOffset(SrcIdx) ? SrcIdx : -1; in lowerShuffleAsSpecificZeroOrAnyExtend()
41458 if (KnownUndef1[SrcIdx] || KnownZero1[SrcIdx]) { in combineTargetShuffle()
41465 int M = TargetMask1[SrcIdx]; in combineTargetShuffle()
42575 unsigned SrcIdx = (LoMask & 0x2) >> 1; in SimplifyDemandedVectorEltsForTargetNode() local
48115 if (UndefElts[SrcIdx]) { in combineVectorPack()
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/openbsd/gnu/llvm/llvm/lib/Transforms/Scalar/
H A DInferAddressSpaces.cpp1215 int SrcIdx = U.getOperandNo(); in rewriteWithNewAddressSpaces() local
1216 int OtherIdx = (SrcIdx == 0) ? 1 : 0; in rewriteWithNewAddressSpaces()
1222 Cmp->setOperand(SrcIdx, NewV); in rewriteWithNewAddressSpaces()
1230 Cmp->setOperand(SrcIdx, NewV); in rewriteWithNewAddressSpaces()
/openbsd/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h640 for (unsigned SrcIdx = StartSrcIdx; SrcIdx < StartSrcIdx + NumSrcsUsed; in findValueFromBuildVector() local
641 ++SrcIdx) in findValueFromBuildVector()
642 NewSrcs.push_back(BV.getReg(SrcIdx)); in findValueFromBuildVector()
/openbsd/gnu/llvm/llvm/lib/Transforms/InstCombine/
H A DInstCombineVectorOps.cpp539 int SrcIdx = in visitExtractElementInst() local
545 if (SrcIdx < 0) in visitExtractElementInst()
547 if (SrcIdx < (int)LHSWidth) in visitExtractElementInst()
550 SrcIdx -= LHSWidth; in visitExtractElementInst()
555 Src, ConstantInt::get(Int32Ty, SrcIdx, false)); in visitExtractElementInst()
/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4074 if (SrcIdx == -1) in validateLdsDirect()
4076 const auto &Src = Inst.getOperand(SrcIdx); in validateLdsDirect()
6456 int SrcIdx = 0; in cvtExp() local
6463 assert(SrcIdx < 4); in cvtExp()
6464 OperandIdx[SrcIdx] = Inst.size(); in cvtExp()
6466 ++SrcIdx; in cvtExp()
6471 assert(SrcIdx < 4); in cvtExp()
6472 OperandIdx[SrcIdx] = Inst.size(); in cvtExp()
6474 ++SrcIdx; in cvtExp()
6490 assert(SrcIdx == 4); in cvtExp()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.cpp2099 LocIdx SrcIdx = MTracker->getSpillMLoc(SpillID); in transferSpillOrRestoreInst() local
2100 auto ReadValue = MTracker->readMLoc(SrcIdx); in transferSpillOrRestoreInst()
/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp862 SmallVectorImpl<int> &SrcIdx) { in buildHvxVectorReg() argument
866 SrcIdx.push_back(-1); in buildHvxVectorReg()
881 SrcIdx.push_back(I); in buildHvxVectorReg()