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/openbsd/gnu/usr.bin/gcc/gcc/testsuite/g++.old-deja/g++.benjamin/
H A Dtem03.C61 template <class T8>// ERROR - .*
64 T8* next;
65 T8* prev;
66 T8 value;
69 Xthree(T8 init): value(init) {} in Xthree()
71 template <class T8> T8 comp_ge(T8 test) {// ERROR - .* in comp_ge()
72 T8 local_value; in comp_ge()
H A Dtem04.C51 template <class T8>// ERROR - .*
54 T8 value;
56 Xsixteen(T8 init): value(init) {} in Xsixteen()
58 template <template <typename T8> class T9> int comp_ge(int test) {// ERROR - .* in comp_ge()
/openbsd/gnu/gcc/libstdc++-v3/include/ext/pb_ds/detail/
H A Dconstructors_destructor_fn_imps.hpp105 typename T5, typename T6, typename T7, typename T8>
107 PB_DS_CLASS_NAME(T0 t0, T1 t1, T2 t2, T3 t3, T4 t4, T5 t5, T6 t6, T7 t7, T8 t8) in PB_DS_CLASS_NAME()
/openbsd/gnu/usr.bin/gcc/gcc/testsuite/g77.f-torture/compile/
H A D19990826-3.f148 T8=JOFI*N10*N20*((IOFI-1)*IB1/2+IBX1/2)*(3*REQ+9*RAD+4*RMU+RMI)
158 TCPU=T1+T2+T3+T4+T5+T6+T7+T8+T9+T10+TNRAN
253 T8=JOFI*N10*N20*K1*(3*REQ+9*RAD+4*RMU+RMI)/2
267 TCPU=T1+T2+T3+T4+T5+T6+T7+T8+T9+T10
/openbsd/regress/lib/libcrypto/x509/bettertls/certificates/
H A D579.key5 5T8/gqcQdq2E2OUseYxuNa0M+vj9jAvjX8s1TDm/ERBw20xTS1IgWz8uNle3S2Ww
H A D1952.key14 PgrI9nU5orGE3W7DZ4QH3mFWEgPMW74PuV18UY5h3ukP5S3c6ZzSNFV47NgNi+T8
H A D762.key15 9lcD6W0ADPXN1TMcvkZtadC3OIFFHgwfKN0VGVNpcM5kKK9kr/T8/McCgYEArUj2
H A D1767.chain33 b3IgMTc2NzCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAIZPehtFw/T8
H A D1905.chain14 N6nfIpJpyIgcXyVE3Q/T8+SMQ/jjqdaEZDnu60RMOKxxDgRDoKA66wNy8yW9M5f5
H A D2614.chain17 AGc9890/ChDCjuJbZgsxk8flf+T8+IxkYFxMnwYEt52z0zwn3JKsTYD/VeTntsR3
H A D3409.chain22 T8+CY24OUpQAJZkKkWkQ0nw=
/openbsd/sys/arch/mips64/include/
H A Dcpustate.h73 SAVE_REG(t8, T8, frame, bo) ;\
133 RESTORE_REG(t8, T8, frame, bo) ;\
H A Dregnum.h60 #define T8 24 macro
/openbsd/gnu/llvm/llvm/lib/Target/Mips/
H A DMips16InstrInfo.td116 // Implicit use of T8
642 let Uses = [T8];
646 let Uses = [T8];
670 let Uses = [T8];
674 let Uses = [T8];
696 let Defs = [T8];
705 let Defs = [T8];
714 let Defs = [T8];
1174 let Defs = [T8];
1184 let Defs = [T8];
[all …]
H A DMipsRegisterInfo.td112 def T8 : MipsGPRReg< 24, "24">, DwarfRegNum<[24]>;
147 def T8_64 : Mips64GPRReg< 24, "24", [T8]>, DwarfRegNum<[24]>;
294 T8, T9,
314 T8, T9,
H A DMipsCallingConv.td271 CCAssignToReg<[A0, A1, A2, A3, T0, T1, T2, T3, T4, T5, T6, T7, T8, V1]>>>,
273 // In NaCl, T6, T7 and T8 are reserved and not available as argument
276 // accesses (loads and stores). T8 contains the thread pointer.
H A DMipsRegisterInfo.cpp169 Reserved.set(Mips::T8); // Reserved for thread pointer. in getReservedRegs()
H A DMips16ISelLowering.cpp765 .addReg(Mips::T8); in emitFEXT_CCRX16_ins()
783 .addReg(Mips::T8); in emitFEXT_CCRXI16_ins()
H A DMicroMipsSizeReduction.cpp383 Mips::S6, Mips::S7, Mips::T8, Mips::T9, Mips::K0, Mips::K1, Mips::GP, in ConsecutiveRegisters()
/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrFMA3Info.cpp149 (TSFlags & X86II::OpMapMask) == X86II::T8) || in getFMA3Group()
151 ((TSFlags & X86II::OpMapMask) == X86II::T8 || in getFMA3Group()
H A DX86InstrFormats.td158 def T8 : Map<2>;
204 class T8 { Map OpMap = T8; }
225 class T8PS : T8 { Prefix OpPrefix = PS; }
226 class T8PD : T8 { Prefix OpPrefix = PD; }
227 class T8XD : T8 { Prefix OpPrefix = XD; }
228 class T8XS : T8 { Prefix OpPrefix = XS; }
710 // SS38I - SSSE3 instructions with T8 prefix.
738 // SS48I - SSE 4.1 instructions with T8 prefix.
752 // SS428I - SSE 4.2 instructions with T8 prefix.
807 // AVX512XS8I - AVX-512 instructions with T8 and XS prefixes.
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp259 return Reg != Mips::SP && Reg != Mips::T8; in baseRegNeedsLoadStoreMask()
/openbsd/gnu/llvm/llvm/utils/TableGen/
H A DX86RecognizableInstr.h137 OB = 0, TB = 1, T8 = 2, TA = 3, XOP8 = 4, XOP9 = 5, XOPA = 6, ThreeDNow = 7, enumerator
/openbsd/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp721 case X86II::T8: in emitVEXOpcodePrefix()
1305 case X86II::T8: // 0F 38 in emitOpcodePrefix()
1313 case X86II::T8: // 0F 38 in emitOpcodePrefix()
H A DX86BaseInfo.h813 T8 = 2 << OpMapShift, TA = 3 << OpMapShift, enumerator

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