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Searched refs:TCI_CNTL_1__REQ_FIFO_DEPTH_MASK (Results 1 – 11 of 11) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10722 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK 0x00ff0000L macro
H A Dgfx_7_2_sh_mask.h14605 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK 0xff0000 macro
H A Dgfx_8_0_sh_mask.h16533 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK 0xff0000 macro
H A Dgfx_8_1_sh_mask.h17121 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK 0xff0000 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h9087 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK macro
H A Dgc_9_1_sh_mask.h10592 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK macro
H A Dgc_9_2_1_sh_mask.h10422 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK macro
H A Dgc_9_4_3_sh_mask.h11922 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK macro
H A Dgc_9_4_2_sh_mask.h27818 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK macro
H A Dgc_10_1_0_sh_mask.h15730 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK macro
H A Dgc_10_3_0_sh_mask.h14529 #define TCI_CNTL_1__REQ_FIFO_DEPTH_MASK macro